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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-02-15 22:50:23 +0100
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-03-09 01:40:18 +0100
commitc2e49866a967e0047ad0221b76bd35b00ca2ff6f (patch)
treeab1eab1b3fe1e969923ad9958e2641d91d13b6eb
parente2507756d71c70fbe9895b9519e376f113828aa8 (diff)
sunxi (sun50i): support i2c on A64 (pin-config, clocking)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h3
-rw-r--r--arch/arm/mach-sunxi/clock.c2
-rw-r--r--board/sunxi/board.c18
3 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 7cdf5a38a0..b85ca2293a 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -176,6 +176,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPE_SDC2 3
#define SUN8I_GPE_TWI2 3
+#define SUN50I_GPE_TWI2 3
#define SUNXI_GPF_SDC0 2
#define SUNXI_GPF_UART0 4
@@ -195,8 +196,10 @@ enum sunxi_gpio_number {
#define SUN4I_GPH_SDC1 5
#define SUN6I_GPH_TWI0 2
#define SUN8I_GPH_TWI0 2
+#define SUN50I_GPH_TWI0 2
#define SUN6I_GPH_TWI1 2
#define SUN8I_GPH_TWI1 2
+#define SUN50I_GPH_TWI1 2
#define SUN6I_GPH_TWI2 2
#define SUN6I_GPH_UART0 2
#define SUN9I_GPH_UART0 2
diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c
index e6f53f91e6..457a0765db 100644
--- a/arch/arm/mach-sunxi/clock.c
+++ b/arch/arm/mach-sunxi/clock.c
@@ -43,6 +43,7 @@ int clock_twi_onoff(int port, int state)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#if !defined(CONFIG_MACH_SUN50I)
if (port == 5) {
if (state)
prcm_apb0_enable(
@@ -52,6 +53,7 @@ int clock_twi_onoff(int port, int state)
PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
return 0;
}
+#endif
/* set the apb clock gate and reset for twi */
if (state) {
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b64d1c9c6e..e887479e4a 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -499,6 +499,13 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
clock_twi_onoff(0, 1);
+#elif defined(CONFIG_MACH_SUN50I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_GPH_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_GPH_TWI0);
+ /* The A64-uQ7 doesn't have external pull-ups for I2C[01]. */
+ sunxi_gpio_set_pull(SUNXI_GPH(0), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP);
+ clock_twi_onoff(0, 1);
#endif
#endif
@@ -519,6 +526,13 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN50I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN50I_GPH_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN50I_GPH_TWI1);
+ /* The A64-uQ7 doesn't have external pull-ups for I2C[01]. */
+ sunxi_gpio_set_pull(SUNXI_GPH(2), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_pull(SUNXI_GPH(3), SUNXI_GPIO_PULL_UP);
+ clock_twi_onoff(1, 1);
#endif
#endif
@@ -539,6 +553,10 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN50I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(14), SUN50I_GPE_TWI2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUN50I_GPE_TWI2);
+ clock_twi_onoff(2, 1);
#endif
#endif