diff options
author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-02-16 00:47:41 +0100 |
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committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-03-09 01:40:21 +0100 |
commit | bb8850c23d8c5230b9d52ef14b71c697b53f241d (patch) | |
tree | f17da76f57ba50fa5927ad6a15f93f1c2362989e | |
parent | fd98b577745f4bed94839874963cacbc3f8224d8 (diff) |
sun50i: dts: add spi0 and spi1 nodes and pinconfig
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r-- | arch/arm/dts/sun50i-a64.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index 1271fb58ec..f5d4cb562c 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -310,6 +310,22 @@ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; clock-output-names = "mmc2"; }; + + spi0_clk: spi0_clk@01c200a0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200a0 0x4>; + clocks = <&osc24M>, <&pll6 0>, <&pll7 0>; + clock-output-names = "spi0"; + }; + + spi1_clk: spi1_clk@01c200a4 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200a4 0x4>; + clocks = <&osc24M>, <&pll6 0>, <&pll7 0>; + clock-output-names = "spi1"; + }; }; soc { @@ -535,6 +551,16 @@ allwinner,drive = <SUN4I_PINCTRL_40_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + spi0_pins: spi0_pins { + allwinner,pins = "PC0", "PC1", "PC2", "PC3"; + allwinner,function = "spi0"; + }; + + spi1_pins: spi1_pins { + allwinner,pins = "PD0", "PD1", "PD2", "PD3"; + allwinner,function = "spi1"; + }; }; r_pio: pinctrl@01f02c00 { @@ -702,5 +728,25 @@ phy-names = "usb"; status = "enabled"; }; + + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; + clocks = <&bus_gates 20>, <&spi0_clk>; + clock-names = "ahb", "spi"; + resets = <&ahb_rst 20>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + spi1: spi@01c69000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c69000 0x1000>; + clocks = <&bus_gates 21>, <&spi1_clk>; + clock-names = "ahb", "spi"; + resets = <&ahb_rst 21>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; }; |