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author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-02-01 15:06:12 +0100 |
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committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-03-09 01:40:18 +0100 |
commit | 5aa84a4a095a7aaf34e31c834a09f71268bda42a (patch) | |
tree | 68302e6622c49b2d1f760fc6930c377495edc37d | |
parent | f469436215c9310847b6e152d7a490bf6c401b88 (diff) |
sunxi: sun50i/a64: enabled GPIO via sunxi_gpio.c
X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r-- | drivers/gpio/sunxi_gpio.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 8d2bb18504..68dd9fe74c 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -353,6 +353,12 @@ static const struct udevice_id sunxi_gpio_ids[] = { ID("allwinner,sun8i-a83t-pinctrl", a_all), ID("allwinner,sun8i-h3-pinctrl", a_all), ID("allwinner,sun9i-a80-pinctrl", a_all), + /* This is not strictly correct for the A64, as it is missing + * bank 'A'. Yet, the register layout in the pinctrl block is + * backward compatible and any accesses to the registers that + * normally control bank 'A' will have no adverse effect. + */ + ID("allwinner,sun50i-a64-pinctrl", a_all), ID("allwinner,sun6i-a31-r-pinctrl", l_2), ID("allwinner,sun8i-a23-r-pinctrl", l_1), ID("allwinner,sun8i-a83t-r-pinctrl", l_1), |