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/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <debug.h>
#include <plat_config.h>
#include <mmio.h>
#include <sys/errno.h>
#include "sunxi_def.h"
#include "sunxi_private.h"
#define PMIC_RSB_RT_ADDR 0x2d
int sunxi_pmic_read(uint8_t reg)
{
uint32_t val;
int ret;
ret = rsb_read(PMIC_RSB_RT_ADDR, reg, &val, 1);
if (ret)
return ret;
return val;
}
int sunxi_pmic_write(uint8_t reg, uint8_t value)
{
return rsb_write(PMIC_RSB_RT_ADDR, reg, value, 1);
}
/* Setup the PMIC: DCDC1 to 3.3V, enable DC1SW and DLDO4 */
static int pmic_setup(void)
{
int ret;
ret = sunxi_pmic_read(0x20);
if (ret != 0x0e && ret != 0x11) {
int voltage = (ret & 0x1f) * 10 + 16;
NOTICE("PMIC: DCDC1 voltage is an unexpected %d.%dV\n",
voltage / 10, voltage % 10);
return -1;
}
if (ret != 0x11) {
/* Set DCDC1 voltage to 3.3 Volts */
ret = sunxi_pmic_write(0x20, 0x11);
if (ret < 0) {
NOTICE("PMIC: error %d writing DCDC1 voltage\n", ret);
return -2;
}
}
ret = sunxi_pmic_read(0x12);
if ((ret & 0x3f) != 0x01) {
NOTICE("PMIC: Output power control 2 is an unexpected 0x%x\n",
ret);
return -3;
}
if ((ret & 0xc1) != 0xc1) {
/* Enable DC1SW to power PHY and DLDO4 for WiFi */
ret = sunxi_pmic_write(0x12, ret | 0xc0);
if (ret < 0) {
NOTICE("PMIC: error %d enabling DC1SW/DLDO4\n", ret);
return -4;
}
}
ret = sunxi_pmic_read(0x10);
sunxi_pmic_write(0x10, ret | (1 << 3));
sunxi_pmic_write(0x23, 0x46); /* DCDC4 = ETH PHY = 1.2V */
sunxi_pmic_write(0x24, 0x2c); /* DCDC5 = DDR3L voltage = 1.36V */
// sunxi_pmic_write(0x24, 0xb3); /* DCDC5 = DDR RAM voltage = 1.5V */
return 0;
}
/*
* Program the AXP803 via the RSB bus.
*/
int sunxi_pmic_setup(void)
{
int ret;
NOTICE("Configuring AXP PMIC\n");
/* Test PMIC communication */
ret = sunxi_pmic_read(0x03);
if (ret < 0) {
ERROR("PMIC: error %d reading PMIC IC type register\n", ret);
return -2;
}
/* Check IC type number equals 0b01xx00001 */
if ((ret & 0xcf) != 0x41) {
ERROR("PMIC: unknown PMIC IC type 0x%x\n", ret);
return -3;
}
/* Setup the PMIC */
ret = pmic_setup();
if (!ret)
NOTICE("PMIC: setup successful\n");
else
ERROR("PMIC: setup failed: %d\n", ret);
return ret;
}
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