From c3260f9b82c5017ca078f090c03cd7135ee8f8c9 Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Wed, 30 Apr 2014 15:36:37 +0100 Subject: Preserve x19-x29 across world switch for exception handling Previously exception handlers in BL3-1, X19-X29 were not saved and restored on every SMC/trap into EL3. Instead these registers were 'saved as needed' as a side effect of the A64 ABI used by the C compiler. That approach failed when world switching but was not visible with the TSP/TSPD code because the TSP is 64-bit, did not clobber these registers when running and did not support pre-emption by normal world interrupts. These scenarios showed that the values in these registers can be passed through a world switch, which broke the normal and trusted world assumptions about these registers being preserved. The Ideal solution saves and restores these registers when a world switch occurs - but that type of implementation is more complex. So this patch always saves and restores these registers on entry and exit of EL3. Fixes ARM-software/tf-issues#141 Change-Id: I9a727167bbc594454e81cf78a97ca899dfb11c27 --- services/std_svc/psci/psci_entry.S | 1 - 1 file changed, 1 deletion(-) (limited to 'services/std_svc') diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S index e2c690d..50f74a6 100644 --- a/services/std_svc/psci/psci_entry.S +++ b/services/std_svc/psci/psci_entry.S @@ -104,7 +104,6 @@ psci_aff_common_finish_entry: mov x0, x19 bl platform_set_stack - zero_callee_saved_regs b el3_exit _panic: b _panic -- cgit v1.2.3