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2016-06-02sun50i: platform.mk: rewrap source file listingAndre Przywara
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: introduce get_highest_el() functionalityAndre Przywara
Add a function to get the highest implemented exception level and use that for entering BL3-3 in. Also we make the bit-size we enter non-secure world a parameter, so that we can easily switch between AArch32 and AArch64. (HACK: Keep entering U-Boot still in AArch32 SVC for now.) Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded platform specific address definitionsAndre Przywara
sun50iw1p1.h contains a lot of register addresses and platform specific defines, the vast majority of them both unused by the code and also not needed for a bl31 setup. Remove the header file and pull the actually needed definitions into sunxi_def.h. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: clean up serial (debug) driverAndre Przywara
The serial debug driver is hard to read. Also it uses a C struct to describe a fixed hardware device' register layout. Clean up the code to be more readable and switch to the usual (BASE_ADDR + REG_OFFSET) scheme for accessing registers. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded sunxi_config_setup()Andre Przywara
This function does nothing, apparently it was copied from the FVP code. Remove its definition and the call. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: define empty print_plat_interconnect_regsAndre Przywara
Instead of commenting the routine from FVP and the call, simply define the print_plat_interconnect_regs macros as empty, which is the recommended way in case there is no interconnect information available. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove Allwinner hash outputAndre Przywara
We actually have the short SHA1 of the HEAD commit already in the output, so there is no need for that extra bloated code to insert it into the binary. Remove it. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: MMU setup: remove unneeded EL1 versionAndre Przywara
We have macros to generate define and populate the memory map structures, but in fact need only one instance for EL3, as sunxi does not need EL1 page tables. Remove the unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded TSP implementationAndre Przywara
The TSP is just for testing a secure payload, which we don't need, so just remove the code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded BL1 and BL2 codeAndre Przywara
The sun50i port only uses BL31, so there is no need for then BL1 and BL2 code files (copied from the FVP port). Remove them. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded AEM and A57 codeAndre Przywara
No need to compile those code in. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: clean up sunxi_security codeAndre Przywara
Remove dead code, unused definitions and stream-line the code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: simplify topology setupAndre Przywara
The topology code was apparently copied from the ARM FVP model, which is very versatile and allows for a sophisticated, configurable topology setup. Allwinner SoC on the other hand are at best multi-cluster - the A64 in fact has only one cluster. Simplify the sunxi specific topology code to support two affinity levels at most - this drastically reduces the code size and makes it much more readable. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-02-16sun50i: remove unused sunxi_gic_initAndre Przywara
2016-02-16sun50i: remove unused CCI initAndre Przywara
2016-02-16sun50i: fix timer frequencyAndre Przywara
The architected timer is hardwired to be driven by the 24 MHz clock. Remove all code that tries to determine this dynamically. Also fix the actual number, which is not 24 * 2^20, but 24 * 10^6 Hz. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-02-16sun50i: platform.S: clean up serial consoleAndre Przywara
Add some constants to the console code to make it more readable.
2016-02-06sun50i: plat_helpers.S cleanupAndre Przywara
A lot of code is not needed: - no need for empty function which have a default implementation - no need for A57 code and Juno workarounds - no need for specific core enumeration in a single cluster SoC
2016-02-04enter non-secure world in non-secure EL2Andre Przywara
2016-02-04sun50i: bl33_entry: reactivate code (but still use SVC32)Andre Przywara
2016-02-04Makefile: remove copying of final binaryAndre Przywara
After the actual build process the Makefile copied the resulting binary into Allwinner's build tree (for deployment). Remove this copy to allow build outside of Allwinner's build environment.
2016-02-04arisc: make debug macros -pedantic compatibleAndre Przywara
Allwinner removed "-pedantic" from the list of CFLAGS to get away with some conditional debug macros using a GNU extension. Fix those macros to use a standard compliant syntax and re-enable -pedantic.
2016-02-04Makefile: fix w/s errorAndre Przywara
2016-02-04Makefile: comment Cortex-A53 linker fix optionAndre Przywara
Newer versions of binutils' ld recognize a errata fix option to avoid issues with a certain ARM Cortex-A53 errata. Since this option is widely available yet, comment it for now to allow build with older toolchains.
2016-02-04Makefile: revert Allwinner changes to default targetAndre Przywara
Apparently for convenience reasons the Makefile was changed by Allwinner to: * build the sun50iw1p1 target by default * hardcode the cross compiler from Allwinner's toolchain * enable debug build by default Revert those changes to bring the build system back into a sane state.
2016-02-04Merge in files from Allwinners lichee BSP tarballAndre Przywara
The Pine64 Wiki[1] links to a BSP tarball, among other things containing a dump of an ARM Trusted Firmware source tree with Allwinner changes on top. Since the tarball does not contain any version history information about the changes, this commit is just the diff between the ATF 1.0 release and the files from the Allwinner provided tarball. The executable flag from many source has been removed. [1] http://wiki.pine64.org/index.php/Pine_A64_Software_Release#Linux_BSP_Related
2014-08-28Merge pull request #205 from danh-arm/dh/1.0-docsdanh-arm
Documentation for version 1.0
2014-08-28Merge pull request #204 from danh-arm/dh/user-guide-fixesdanh-arm
Fix minor issues in user guide
2014-08-28Documentation for version 1.0Dan Handley
Final updates to readme.md and change-log.md for ARM Trusted Firmware version 1.0. Also increment the version in the Makefile. Change-Id: I00fe1016c8b936834bbf7bbba7aab07f51261bbb
2014-08-28Fix minor issues in user guideDan Handley
* Fix broken link to SCP download. * Remove requirement to install `ia32-libs`. This package is no longer available in current versions of Ubuntu and is no longer required when using the Linaro toolchain. Change-Id: I9823d535a1d69136685754b7707b73e1eef0978d
2014-08-27Merge pull request #203 from danh-arm/dh/misc-docs-1.0danh-arm
Miscellaneous documentation fixes
2014-08-27Miscellaneous documentation fixesSandrine Bailleux
This patch gathers miscellaneous minor fixes to the documentation, and comments in the source code. Change-Id: I631e3dda5abafa2d90f464edaee069a1e58b751b Co-Authored-By: Soby Mathew <soby.mathew@arm.com> Co-Authored-By: Dan Handley <dan.handley@arm.com>
2014-08-27Merge pull request #202 from achingupta/ag/fw-design-juno-updatedanh-arm
Add information about Juno in firmware-design.md
2014-08-27Add information about Juno in firmware-design.mdJuan Castillo
This patch reorganizes the firmware design guide to add information about the port of the ARM Trusted Firmware to the Juno ARM development platform. Change-Id: I0b80e2e7a35ccad1af2e971506cfb7fe505f8b84
2014-08-27Merge pull request #200 from danh-arm/dh/fix-reset-to-bl31-part2danh-arm
Fix reset to BL3-1 instructions in user guide, part 2
2014-08-27Merge pull request #201 from danh-arm/jc/juno-user-guidedanh-arm
Add Juno instructions to user guide
2014-08-27Add Juno instructions to user guideJuan Castillo
This patch makes the Trusted Firmware build instructions in the user guide platform independent. FVP specific instructions have been grouped together under a new section dedicated to FVP. Juno specific instructions to build and run the Trusted Firmware, UEFI and Linux have been added. Change-Id: I9bfb1b9d732b1f73abbe29f68ac931e1773a4fd5
2014-08-27Fix reset to BL3-1 instructions in user guide, part 2Dan Handley
Fix the instructions for resetting to the BL3-1 entrypoint in the user guide. The BL3-1 and BL3-2 image locations changed in the fix to ARM-software/tf-issues#100 (commit 186c1d4). This is distinct from the similar issue fixed in commit bfb1dd5. Also clarify the dependence on the FVP_SHARED_DATA_LOCATION and FVP_TSP_RAM_LOCATION build options, and tidy up the "Notes regarding Base FVP configuration options" section. Change-Id: I6b03452a71f0c69efa169852712bcb184242696e
2014-08-21Merge pull request #198 from danh-arm/dh/move-up-dependenciesdanh-arm
Move up dependency versions in user guide
2014-08-21Merge pull request #197 from soby-mathew/rationalize_uartsdanh-arm
Rationalize UART usage among different BL stages
2014-08-21Rationalize UART usage among different BL stagesSoby Mathew
This patch changes the UART port assignment for various BL stages so as to make it consistent on the platform ports. The BL1, BL2 and BL3-1 now uses UART0 on the FVP port and SoC UART0 on the Juno port. The BL3-2 uses UART2 on the FVP port and FPGA UART0 on the Juno port. This provides an interim fix to ARM-software/tf-issues#220 until support is added for changing the UART port for a BL image between cold boot and runtime. Change-Id: Iae5faea90be3d59e41e597b34a902f93e737505a
2014-08-21Move up dependency versions in user guideDan Handley
Move up the version numbers of the following Trusted Firmware dependencies in the user guide: * Foundation and Base FVPs (latest publically available versions). * EDK2 implementation. The guide now uses the latest version from https://github.com/ARM-software/edk2.git. This requires the `iasl` package to also be installed. * Linux kernel. The guide now uses the latest version from https://github.com/ARM-software/linux.git. * Linaro OpenEmbedded file system. * ARM Development Studio 5. Change-Id: I95bb863a61e47b9ef8be3d110f7087375ee78add
2014-08-21Merge pull request #196 from soby-mathew/sm/tf_juno_supportdanh-arm
Add support for Juno in Trusted Firmware
2014-08-21Juno: Read primary CPU MPID from SCC GPR_1Juan Castillo
This patch removes the PRIMARY_CPU definition hardcoded in the Juno port. Instead, the primary CPU is obtained at runtime by reading the SCC General Purpose Register 1 (GPR_1), whose value is copied by the SCP into shared memory during the boot process. Change-Id: I3981daa92eb7142250712274cf7f655b219837f5
2014-08-21Juno: Implement PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo
This patch adds the Juno platform specific handlers for PSCI SYSTEM_OFF and SYSTEM_RESET operations. Change-Id: Ie389adead533ec2314af44d721b4d0f306147c7d
2014-08-21Juno: Add support for Test Secure-EL1 PayloadSandrine Bailleux
This patch implements the TSP on Juno. It executes from on-chip Trusted SRAM. Also, the other bootloader images (i.e. BL1 R/W, BL2 and BL3-1) have been moved around. The reason is, although there was enough space overall to store the TSP in SRAM, there was no contiguous free chunk of SRAM big enough to hold it. This patch keeps the overall memory layout (i.e. keeping BL1 R/W at the bottom, BL2 at the top and BL3-1 in between) but moves the base addresses of all the bootloader images in such a way that: - memory fragmentation is reduced enough to fit BL3-2 in; - new base addresses are suitable for release builds as well as debug ones; - each image has a few extra kilobytes for future growth. BL3-1 and BL3-2 are the images which received the biggest allocations since they will most probably grow the most. This patch also adds instruction synchronization barriers around the code which handles the timer interrupt in the TSP. This ensures that the interrupt is not acknowledged after or EOIed before it is deactivated at the peripheral. Change-Id: I1c5b51858700027ee283ac85d18e06863a27c72e
2014-08-21Juno: Implement PSCI CPU_OFF and CPU_SUSPEND APIsAchin Gupta
This patch adds support for PSCI CPU_OFF and CPU_SUSPEND APIs to the Juno port of the ARM Trusted Firmware. The maximum affinity level that can be suspended is the cluster level (affinity level 1). Support for suspending the system level is not present. Change-Id: Ie2c9da0acd7d1b0d5ac64940cdf40347153e52c8
2014-08-21Juno: Implement initial platform portSandrine Bailleux
This patch adds the initial port of the ARM Trusted Firmware on the Juno development platform. This port does not support a BL3-2 image or any PSCI APIs apart from PSCI_VERSION and PSCI_CPU_ON. It enables workarounds for selected Cortex-A57 (#806969 & #813420) errata and implements the workaround for a Juno platform errata (Defect id 831273). Change-Id: Ib3d92df3af53820cfbb2977582ed0d7abf6ef893
2014-08-20Merge pull request #195 from achingupta/ag/fvp_dt_updatesdanh-arm
FVP: Update device trees to match cpuidle driver
2014-08-20Merge pull request #194 from danh-arm/sm/tf-issues#98danh-arm
Implement the CPU Specific operations framework v3
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