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authorAndre Przywara <andre.przywara@arm.com>2016-02-23 14:50:21 +0000
committerAndre Przywara <andre.przywara@arm.com>2016-06-02 01:29:48 +0100
commitc13ce5d59ca50b566c4bd783b2d5ac2cbde7dadb (patch)
treed7b566445d7fb06fdb1c9d4904833a246f8ee1a9 /plat/sun50iw1p1
parentea17218134b77ee7bab3091984944fd4070924af (diff)
sun50i: platform_smp_init(): fix unneeded comments and rewrap lines
Improve readability by removing comments that just repeat the code and trim the line width to fit into 80 characters. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'plat/sun50iw1p1')
-rw-r--r--plat/sun50iw1p1/aarch64/plat_helpers.S20
1 files changed, 11 insertions, 9 deletions
diff --git a/plat/sun50iw1p1/aarch64/plat_helpers.S b/plat/sun50iw1p1/aarch64/plat_helpers.S
index 7a1e851..ca10133 100644
--- a/plat/sun50iw1p1/aarch64/plat_helpers.S
+++ b/plat/sun50iw1p1/aarch64/plat_helpers.S
@@ -46,15 +46,17 @@ func platform_mem_init
ret
func platform_smp_init
- mrs x0, ACTLR_EL3 // Read ACTLR_EL3
- orr x0, x0, #(1 << 1) // Set CPUECTLR_EL1 access control bit
- msr ACTLR_EL3, x0 // Write ACTLR_EL3
- mrs x0, ACTLR_EL2 // Read ACTLR_EL2
- orr x0, x0, #(1 << 1) // Set CPUECTLR_EL1 access control bit
- msr ACTLR_EL2, x0 // Write ACTLR_EL2
- mrs x0, S3_1_c15_c2_1 // Read CPUECTLR_EL1
- orr x0, x0, #(1 << 6) // Set the SMPEN bit
- msr S3_1_c15_c2_1, x0 // Write CPUECTLR_EL1
+ mrs x0, ACTLR_EL3
+ orr x0, x0, #(1 << 1) // Set CPUECTLR_EL1 access control bit
+ msr ACTLR_EL3, x0
+
+ mrs x0, ACTLR_EL2
+ orr x0, x0, #(1 << 1) // Set CPUECTLR_EL1 access control bit
+ msr ACTLR_EL2, x0
+
+ mrs x0, S3_1_c15_c2_1 // Read CPUECTLR_EL1
+ orr x0, x0, #(1 << 6) // Set the SMPEN bit
+ msr S3_1_c15_c2_1, x0 // Write CPUECTLR_EL1
mov x0, #0x0
msr cntvoff_el2, x0
ret