diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2016-10-03 22:40:51 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2016-11-10 00:09:52 +0000 |
| commit | ac123692b2f6db46bcae6ec0ea14d309051b9b9c (patch) | |
| tree | 54efe3a2782bf5ca3a173bbd841ef115f2b4cb7b /plat/sun50iw1p1 | |
| parent | e70dd6ebe65d62d4d4d5873c3d2c900fe5633313 (diff) | |
sunxi: power: set DRAM voltage to 1.5V
On the Pine64 boards (at least on some of them) the PMIC does not reset
the DRAM voltage (DCDC5) to the required 1.5V.
Program the respective AXP register to improve DRAM stability.
Diffstat (limited to 'plat/sun50iw1p1')
| -rw-r--r-- | plat/sun50iw1p1/sunxi_power.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c index 71d7775..11badcd 100644 --- a/plat/sun50iw1p1/sunxi_power.c +++ b/plat/sun50iw1p1/sunxi_power.c @@ -251,6 +251,8 @@ static int pmic_setup(void) } } + sunxi_pmic_write(0x24, 0xb3); /* DCDC5 = DDR RAM voltage = 1.5V */ + return 0; } |