diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2014-08-14 11:33:56 +0100 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2014-08-20 19:13:25 +0100 |
| commit | 9b4768417051ead50135d1d7675cab940d864e8d (patch) | |
| tree | 3105204d317eb7516d184923a8ea66da3aa767f2 /lib/aarch64 | |
| parent | aecc0840805672279e4165f4d368a59b5c20771e (diff) | |
Introduce framework for CPU specific operations
This patch introduces a framework which will allow CPUs to perform
implementation defined actions after a CPU reset, during a CPU or cluster power
down, and when a crash occurs. CPU specific reset handlers have been implemented
in this patch. Other handlers will be implemented in subsequent patches.
Also moved cpu_helpers.S to the new directory lib/cpus/aarch64/.
Change-Id: I1ca1bade4d101d11a898fb30fea2669f9b37b956
Diffstat (limited to 'lib/aarch64')
| -rw-r--r-- | lib/aarch64/cpu_helpers.S | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/lib/aarch64/cpu_helpers.S b/lib/aarch64/cpu_helpers.S deleted file mode 100644 index abb996d..0000000 --- a/lib/aarch64/cpu_helpers.S +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <arch.h> -#include <asm_macros.S> - - .weak cpu_reset_handler - - -func cpu_reset_handler - /* --------------------------------------------- - * As a bare minimal enable the SMP bit. - * --------------------------------------------- - */ - mrs x0, midr_el1 - lsr x0, x0, #MIDR_PN_SHIFT - and x0, x0, #MIDR_PN_MASK - cmp x0, #MIDR_PN_A57 - b.eq smp_setup_begin - cmp x0, #MIDR_PN_A53 - b.ne smp_setup_end -smp_setup_begin: - mrs x0, CPUECTLR_EL1 - orr x0, x0, #CPUECTLR_SMP_BIT - msr CPUECTLR_EL1, x0 - isb -smp_setup_end: - ret |