diff options
author | Andre Przywara <andre.przywara@arm.com> | 2016-02-23 12:34:22 +0000 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2016-06-02 01:29:47 +0100 |
commit | 6df6f935eaf55bf6938a4479e14b7cc06d36cce2 (patch) | |
tree | ddf5b728872a851bf74922a493046742f113ffee | |
parent | c11a98fb4746a39beb74c47aa371647d793345b4 (diff) |
sun50i: remove now unused trusted mapping
Without the arisc there is no need to reserve a memory mapping for
later. Remove the entries from the data structure to avoid unneeded
mappings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-rw-r--r-- | plat/sun50iw1p1/aarch64/sunxi_common.c | 6 | ||||
-rw-r--r-- | plat/sun50iw1p1/sunxi_def.h | 35 |
2 files changed, 2 insertions, 39 deletions
diff --git a/plat/sun50iw1p1/aarch64/sunxi_common.c b/plat/sun50iw1p1/aarch64/sunxi_common.c index da5ed3d..ded47a7 100644 --- a/plat/sun50iw1p1/aarch64/sunxi_common.c +++ b/plat/sun50iw1p1/aarch64/sunxi_common.c @@ -60,10 +60,8 @@ const mmap_region_t sunxi_mmap[] = { { 0x1000000, 0x1000000, 0x1000000, MT_DEVICE | MT_RW | MT_SECURE }, //2G - { DRAM1_BASE, DRAM1_BASE, SUNXI_MAX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS}, - //TRUSTED dram for secure os and shared memory - { SUNXI_TRUSTED_DRAM_BASE, SUNXI_TRUSTED_DRAM_BASE, SUNXI_TRUSTED_DRAM_SIZE, MT_MEMORY | MT_RW | MT_SECURE }, - { MEMRES_BASE, MEMRES_BASE, MEMRES_SIZE, MT_DEVICE | MT_RW | MT_SECURE }, + { DRAM1_BASE, DRAM1_BASE, + SUNXI_MAX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS}, {0} }; diff --git a/plat/sun50iw1p1/sunxi_def.h b/plat/sun50iw1p1/sunxi_def.h index e8825c5..7b4953e 100644 --- a/plat/sun50iw1p1/sunxi_def.h +++ b/plat/sun50iw1p1/sunxi_def.h @@ -73,24 +73,10 @@ #define SUNXI_TRUSTED_MONITOR_BASE 0x00044000 /* 16KB into SRAM A2 */ #define SUNXI_TRUSTED_MONITOR_SIZE (64 << 10) /* 64 KByte */ -//sec os area -#define SUNXI_TRUSTED_DRAM_BASE 0x40200000 -#define SUNXI_TRUSTED_DRAM_SIZE (14<<20) //14 MB - -//monitor area + sec os area -#define SUNXI_TRUSTED_RAM_SIZE 0x01000000 //total 16M - //atf code limit #define SUNXI_TRUSTED_MONITOR_LIMIT (SUNXI_TRUSTED_MONITOR_BASE + SUNXI_TRUSTED_MONITOR_SIZE) -/* 4KB shared memory */ -#define SUNXI_SHARED_RAM_SIZE 0x1000 - -/* Shared memory at the base of Trusted DRAM */ -#define SUNXI_SHARED_RAM_BASE SUNXI_TRUSTED_DRAM_BASE - - #define DRAM1_BASE 0x40000000ull #define DRAM1_SIZE 0x40000000ull //1G #define DRAM1_END (DRAM1_BASE + DRAM1_SIZE - 1) @@ -99,9 +85,6 @@ #define DRAM_BASE DRAM1_BASE #define DRAM_SIZE DRAM1_SIZE -#define MEMRES_BASE SUNXI_TRUSTED_MONITOR_LIMIT //0x40100000 -#define MEMRES_SIZE 0x100000 //1M - /* Load address of BL33 in the sunxi */ #define NS_IMAGE_OFFSET (DRAM1_BASE + 0xA000000) /* DRAM + 160MB */ @@ -116,22 +99,4 @@ #define UART0_CLK_IN_HZ 24000000 -/******************************************************************************* - * Shared Data - ******************************************************************************/ - -/* Entrypoint mailboxes */ -#define TRUSTED_MAILBOXES_BASE SUNXI_SHARED_RAM_BASE -#define TRUSTED_MAILBOXES_SIZE 0x200 -#define TRUSTED_MAILBOX_SHIFT 4 - - -/* Base address where parameters to BL31 are stored */ -#define PARAMS_BASE (TRUSTED_MAILBOXES_BASE + TRUSTED_MAILBOXES_SIZE) - -#define MHU_SECURE_BASE 0x10000 -#define MHU_SECURE_SIZE 0x1000 - -#define MHU_PAYLOAD_CACHED 0 - #endif /* __SUNXI_DEF_H__ */ |