5 files changed, 97 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 947ce5f1ce..b618b60795 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -25,7 +25,24 @@ config STM32F7
 	select SPL_SYS_MALLOC_SIMPLE
 	select SPL_XIP_SUPPORT
 
+config STM32H7
+	bool "stm32h7 family"
+	select CLK
+	select DM_GPIO
+	select DM_RESET
+	select MISC
+	select PINCTRL
+	select PINCTRL_STM32
+	select RAM
+	select REGMAP
+	select STM32_SDRAM
+	select STM32_RCC
+	select STM32_RESET
+	select STM32X7_SERIAL
+	select SYSCON
+
 source "arch/arm/mach-stm32/stm32f4/Kconfig"
 source "arch/arm/mach-stm32/stm32f7/Kconfig"
+source "arch/arm/mach-stm32/stm32h7/Kconfig"
 
 endif
diff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile
index 6b7694471f..0f5ac37168 100644
--- a/arch/arm/mach-stm32/Makefile
+++ b/arch/arm/mach-stm32/Makefile
@@ -7,3 +7,4 @@
 
 obj-$(CONFIG_STM32F4) += stm32f4/
 obj-$(CONFIG_STM32F7) += stm32f7/
+obj-$(CONFIG_STM32H7) += stm32h7/
diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig b/arch/arm/mach-stm32/stm32h7/Kconfig
new file mode 100644
index 0000000000..55e6217950
--- /dev/null
+++ b/arch/arm/mach-stm32/stm32h7/Kconfig
@@ -0,0 +1,12 @@
+if STM32H7
+
+config TARGET_STM32H743_DISCO
+	bool "STM32H743 Discovery board"
+
+config TARGET_STM32H743_EVAL
+	bool "STM32H743 Evaluation board"
+
+source "board/st/stm32h743-eval/Kconfig"
+source "board/st/stm32h743-disco/Kconfig"
+
+endif
diff --git a/arch/arm/mach-stm32/stm32h7/Makefile b/arch/arm/mach-stm32/stm32h7/Makefile
new file mode 100644
index 0000000000..97f92f74ca
--- /dev/null
+++ b/arch/arm/mach-stm32/stm32h7/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2017
+# Patrice Chotard <patrice.chotard@st.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += soc.o
diff --git a/arch/arm/mach-stm32/stm32h7/soc.c b/arch/arm/mach-stm32/stm32h7/soc.c
new file mode 100644
index 0000000000..a65fab6d2e
--- /dev/null
+++ b/arch/arm/mach-stm32/stm32h7/soc.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7m_mpu.h>
+
+u32 get_cpu_rev(void)
+{
+	return 0;
+}
+
+int arch_cpu_init(void)
+{
+	int i;
+
+	struct mpu_region_config stm32_region_config[] = {
+		/*
+		 * Make all 4GB cacheable & executable. We are overriding it
+		 * with next region for any requirement. e.g. below region1,
+		 * 2 etc.
+		 * In other words, the area not coming in following
+		 * regions configuration is the one configured here in region_0
+		 * (cacheable & executable).
+		 */
+		{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
+		O_I_WB_RD_WR_ALLOC, REGION_4GB },
+
+		/* Code area, executable & strongly ordered */
+		{ 0xD0000000, REGION_1, XN_EN, PRIV_RW_USR_RW,
+		STRONG_ORDER, REGION_8MB },
+
+		/* Device area in all H7 : Not executable */
+		{ 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
+		DEVICE_NON_SHARED, REGION_512MB },
+
+		/*
+		 * Armv7m fixed configuration: strongly ordered & not
+		 * executable, not cacheable
+		 */
+		{ 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
+		STRONG_ORDER, REGION_512MB },
+	};
+
+	disable_mpu();
+	for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+		mpu_config(&stm32_region_config[i]);
+	enable_mpu();
+
+	return 0;
+}
+
+void s_init(void)
+{
+}