From dc39ae9513c32dfeb9e018dc0d22c6484514fefb Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Apr 2009 21:30:44 +0200 Subject: at91sam9/at91cap: improve clock framework calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- drivers/spi/atmel_dataflash_spi.c | 7 ++++--- drivers/usb/host/ohci-at91.c | 3 ++- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c index 3eb252c5b5..614965c367 100644 --- a/drivers/spi/atmel_dataflash_spi.c +++ b/drivers/spi/atmel_dataflash_spi.c @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -45,7 +46,7 @@ void AT91F_SpiInit(void) writel(AT91_SPI_NCPHA | (AT91_SPI_DLYBS & DATAFLASH_TCSS) | (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), AT91_BASE_SPI + AT91_SPI_CSR(0)); #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 @@ -53,7 +54,7 @@ void AT91F_SpiInit(void) writel(AT91_SPI_NCPHA | (AT91_SPI_DLYBS & DATAFLASH_TCSS) | (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), AT91_BASE_SPI + AT91_SPI_CSR(1)); #endif @@ -62,7 +63,7 @@ void AT91F_SpiInit(void) writel(AT91_SPI_NCPHA | (AT91_SPI_DLYBS & DATAFLASH_TCSS) | (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), AT91_BASE_SPI + AT91_SPI_CSR(3)); #endif diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 7c44ad0e95..c35319c1cb 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -28,6 +28,7 @@ #include #include #include +#include int usb_cpu_init(void) { @@ -35,7 +36,7 @@ int usb_cpu_init(void) #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) /* Enable PLLB */ - at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB); + at91_sys_write(AT91_CKGR_PLLBR, get_pllb_init()); while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) ; #endif -- cgit v1.2.3