From 30a43cc2aeb84dfd96a411fb2da2ff4ab10dcd5a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 16 Jun 2006 16:57:18 +0200 Subject: Bugfix in I2C initialisation on S3C2400. If the bus is blocked because of a previously interrupted transfer, up to eleven clocks are generated on the I2CSCL line to complete the transfer and to free the bus. With this fix pin I2CSCL (PG6) is really configured as GPIO so the clock pulses are really generated. Patch by Martin Krause, 04 Apr 2006 --- cpu/arm920t/s3c24x0/i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/arm920t') diff --git a/cpu/arm920t/s3c24x0/i2c.c b/cpu/arm920t/s3c24x0/i2c.c index ef56cd1c31..374b683137 100644 --- a/cpu/arm920t/s3c24x0/i2c.c +++ b/cpu/arm920t/s3c24x0/i2c.c @@ -153,7 +153,7 @@ void i2c_init (int speed, int slaveadd) #endif #ifdef CONFIG_S3C2400 /* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */ - gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00000c00; + gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000; #endif /* toggle I2CSCL until bus idle */ -- cgit v1.2.3