From 96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Mon, 26 Oct 2015 13:51:58 +0800 Subject: mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1 T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing for PLL ratio. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/speed.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index d954fe2fd2..e732969e41 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -131,7 +131,8 @@ void get_sys_info(sys_info_t *sys_info) * T2080 rev 1.1 and later also use half mem_pll comparing with rev 1.0 */ #if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ - defined(CONFIG_PPC_T4080) || defined(CONFIG_PPC_T2080) + defined(CONFIG_PPC_T4080) || defined(CONFIG_PPC_T2080) || \ + defined(CONFIG_PPC_T2081) svr = get_svr(); switch (SVR_SOC_VER(svr)) { case SVR_T4240: -- cgit v1.2.3