From 70311e69fa7f0b7c289eb6552ccc3f9fb7320c69 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 7d1836e8be..5933a406cb 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator { diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index ccb1b4b063..449f3b5d50 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index f59bc00e61..10eb91d1b2 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 465df54fc3..d2411e6700 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera" /* Extra Environment */ -- cgit v1.2.3