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2013-05-30Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
2013-05-28tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL buildAxel Lin
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28Tegra: Remove unused/non-existent spl linker script referenceTom Warren
Tegra builds use the common u-boot-spl.lds now. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-05-24powerpc/b4860qds: Add LAW Target ID and Create LAW entry for MapleShaveta Leekha
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/B4: Merge B4420 and B4860 in config_mpc85xx.hPoonam Aggrwal
B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify the defines. - Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere. - defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G. Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24Enable XAUI interface for B4860QDSSuresh Gupta
- Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/p5040: enable PBL tool supportShaohui Xie
Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.hYork Sun
T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24T4240/ramboot: enable PBL tool for T4240Shaohui Xie
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use PBL tool to produce the ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-23ARM: Add Seagate GoFlex Home supportSuriyan Ramasami
Add Seagate GoFlex Home support Start with dockstar configuration define support for RTC, DATE, SATA and EXT4FS Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
2013-05-23ARM: vexpress: enable bootz and hush parser for all VExpress boardsAndre Przywara
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: add support for Versatile Express Cortex-A15-TC2Andre Przywara
This adds support for the Cortex-A15-TC2 core tile for the Versatile Express board by ARM. This is mostly a copy of the A5 support file, but will be extended later with A15 specific options. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: create A5 specific board configRyan Harkin
This patch creates a new config for the A5 dual core tile that includes the generic config for the Versatile Express platform. The generic config has been modified to provide support for the Extended Memory Map, as used on the A5 core tile. A5 does not support the legacy memory map. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: refactoring of Versatile Express CA9x4 supportRyan Harkin
The current ca9x4_ct_vxp platform contains support for a Versatile Express motherboard with a quad core A9 core tile. This patch separates the Versatile Express motherboard code and the A9 specific code, to ease supporting more core tiles in the next patches. Andre: merged the first two of Ryan's original patches and did some checkpatch fixes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23cfi_flash: Fix unaligned accesses to cfi_qry structureAndrew Gabbasov
Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the actual data layout in CFI Flash chips, the alignment issue can't be fixed in the structure. So, unaligned fields need using of explicit unaligned access macros. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-21ARM: atmel: add sama5d3xek supportBo Shen
Add sama5d3xek support with following feature - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector - boot from SPI flash support - boot from SD card support - LCD support - EMAC support - USB OHCI support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-15mmc: update Faraday FTSDC010 for rw performanceKuo-Jung Su
Faraday FTSDC010 is a MMC/SD host controller. Although there is already a driver in current u-boot release, which is modified from eSHDC and contributed by Andes Tech. Its performance is too terrible on Faraday A36x SoC platforms, so I turn to implement this new version of driver which is 10+ times faster than the old one. It's carefully designed to be compatible with Andes chips, so it should be safe to replace it. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini
2013-05-15Power: remove support for Freescale MPC8220Wolfgang Denk
The Freescale MPC8220 Power Architecture processors have long reached EOL; Freescale does not even list these any more on their web site. Remove the code to avoid wasting maitaining efforts on dead stuff. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andy Fleming <afleming@gmail.com>
2013-05-14T4240/net: use QSGMII card PHY address by defaultShaohui Xie
Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card PHY address is variable depends on different slot. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14net/phy: add VSC8574 supportShaohui Xie
The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes interfaces for quad-port dual media capability. This driver supports SGMII and QSGMII MAC mode. For now SGMII mode is tested. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14t4240qds/eth: fixup ethernet for t4240qdsShengzhou Liu
1, Implemented board_ft_fman_fixup_port() to fix port for kernel. 2, Implemented fdt_fixup_board_enet() to fix node status of different slots and interfaces. 3, Adding detection of slot present for XGMII interface. 4, There is no PHY for XFI, so removed related phy address settings. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14powerpc: Add T4160QDSYork Sun
T4160QDS shares the same platform as T4240QDS. T4160 is a low power version of T4240, with eight e6500 cores, two DDR3 controllers, and slightly different SerDes protocols. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14powerpc/t4240qds: Move SoC define into boards.cfgYork Sun
Separate CONFIG_PPC_T4240 from board config file. Prepare to add more SoC variants supported on the same board. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14powerpc/t4240qds: Add voltage ID supportYork Sun
T4240 has voltage ID fuse. Read the fuse and configure the voltage correctly. Core voltage has higher tolerance on over side than below. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14Fman/t4240: some fix for 10G XAUIShaohui Xie
1. fix 10G mac offset by plus 8; 2. add second 10G port info for FM1 & FM2 when init ethernet info; 3. fix 10G lanes name to match lane protocol table; Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14powerpc/t4240qds: fix XAUI card PHY addressShaohui Xie
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14powerpc/t4240qds: Fix SPI flash typeShaohui Xie
T4240QDS uses a SST instead of SPANSION SPI flash. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14image: Add device tree setup to image librarySimon Glass
This seems to be a common function for several architectures, so create a common function rather than duplicating the code in each arch. Also make an attempt to avoid introducing #ifdefs in the new code, partly by removing useless #ifdefs around function declarations in the image.h header. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14image: Add CONFIG_FIT_SPL_PRINT to control FIT image printing in SPLSimon Glass
This code is very large, and in SPL it isn't always useful to print out image information (in fact there might not even be a console active). So disable this feature unless this option is set. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14image: Remove remaining #ifdefs in image-fit.cSimon Glass
There are only two left. One is unnecessary and the other can be moved to the header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14sandbox: image: Add support for booting images in sandboxSimon Glass
Much of the image code uses addresses as ulongs and pointers interchangeably, casting between the two forms as needed. This doesn't work with sandbox, which has a U-Boot RAM buffer which is separate from the host machine's memory. Adjust the cost so that translating from a U-Boot address to a pointer uses map_sysmem(). This allows bootm to work correctly on sandbox. Note that there are no exhaustive tests for this code on sandbox, so it is possible that some dark corners remain. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> (v1)
2013-05-14image: Rename hash printing to fit_image_print_verification_data()Simon Glass
This function will be used to print signatures as well as hashes, so rename it. Also make it static since it is not used outside this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Rename fit_add_hashes() to fit_add_verification_data()Simon Glass
We intend to add signatures to FITs also, so rename this function so that it is not specific to hashing. Also rename fit_image_set_hashes() and make it static since it is not used outside this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Export fit_conf_get_prop_node()Simon Glass
This function will be needed by signature checking code, so export it, and also add docs. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14image: Move hash checking into its own functionSimon Glass
The existing function is long and most of the code is indented a long way. Before adding yet more code, split this out into its own function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> (v1)
2013-05-14image: Rename fit_image_check_hashes() to fit_image_verify()Simon Glass
This is the main entry point to the FIT image verification code. We will be using it to handle image verification with signatures, so rename the function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Convert fit_image_hash_set_value() to static, and renameSimon Glass
This function doesn't need to be exported, and with verification we want to use it for setting the 'value' property in any node, so rename it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Move HOSTCC image code to tools/Simon Glass
This code is never compiled into U-Boot, so move it into a separate file in tools/ to avoid the large #ifdef. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Export fit_check_ramdisk()Simon Glass
One we split out the FIT code from image.c we will need this function. Export it in the header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2013-05-14image: Move timestamp #ifdefs to header fileSimon Glass
Rather than repeat the line #if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \ defined(USE_HOSTCC) everywhere, put this in a header file and #define IMAGE_ENABLE_TIMESTAMP to either 1 or 0. Then we can use a plain if() in most code and avoid the #ifdefs. The compiler's dead code elimination ensures that the result is the same. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2013-05-14libfdt: Add fdt_next_subnode() to permit easy subnode iterationSimon Glass
Iterating through subnodes with libfdt is a little painful to write as we need something like this: for (depth = 0, count = 0, offset = fdt_next_node(fdt, parent_offset, &depth); (offset >= 0) && (depth > 0); offset = fdt_next_node(fdt, offset, &depth)) { if (depth == 1) { /* code body */ } } Using fdt_next_subnode() we can instead write this, which is shorter and easier to get right: for (offset = fdt_first_subnode(fdt, parent_offset); offset >= 0; offset = fdt_next_subnode(fdt, offset)) { /* code body */ } Also, it doesn't require two levels of indentation for the loop body. Signed-off-by: Simon Glass <sjg@chromium.org> (Cherry-picked from dtc commit 4e76ec79) Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2013-05-14bootstage: Don't build for HOSTCCSimon Glass
We don't measure boot timing on the host, or with SPL, so use both conditions in the bootstage header. This allows us to avoid using conditional compilation around bootstage_...() calls. (#ifdef) Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14hash: Add a way to calculate a hash for any algortihmSimon Glass
Rather than needing to call one of many hashing algorithms in U-Boot, provide a function hash_block() which handles this, and can support all available hash algorithms. Once we have md5 supported within hashing, we can use this function in the FIT image code. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-14Merge branch 'master' of git://git.denx.de/u-boot-blackfin into ↵Tom Rini
powerpc-eldk53-warning-fixes
2013-05-13x86: config: Enable LZO for coreboot, remove zlib, gzipSimon Glass
We don't use zlib and gzip but do use lzo, so enable this. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-13bootstage: Allow marking a particular line of codeSimon Glass
Add a function which allows a (file, function, line number) to be marked in bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2013-05-13x86: Enable bootstage for corebootSimon Glass
This is a convenient way of finding out where boottime is going. Enable it for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-13bootstage: Copy bootstage strings post-relocationDoug Anderson
Any pointers to name strings that were passed to bootstage_mark_name() pre-relocation should be copied post-relocation so that they don't get trashed as the original location of U-Boot is re-used for other purposes. This change introduces a new API call that should be called from board_init_r() after malloc has been initted on any board that uses bootstage. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2013-05-13bootstage: Add stubs for new bootstage functionsSimon Glass
Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined. Add one to avoid #ifdefs in the code when this is used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
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