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Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.
This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired. We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.
The observed speedup in testing is greater than 10x (e.g. a 10MB write
decreases from 9.302s to 0.884s).
X-Affected-platforms: A31-uQ7, A80-Q7
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The driver currently only supports sun6i.
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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On A80 boards, both a AXP809 (primary) and AXP806 (secondary)
PMIC are found. The AXP806 supplies the Cortex-A15 cores with
a poly-phase supply to deliver up to 10A of total power.
When used in the slave configuration, the AXP806 needs a write
to the REGADDR_EXT register to configure it to work on the same
RSB bus as the primary PMIC.
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Implement support for the AXP809 PMIC that is used on A80 platforms
as the primary PMIC and powers most peripherals and the CPUA (Cortex-A7)
cluster. A AXP806 is usually the slave PMIC, which will provide the
power for the CPUB (Cortex-A15) cluster.
The default voltage settings have been chosen to be safe values for a
Optimus, Cubieboard and A80-Q7. These changes are validated against the
A80-Q7 module.
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Implement driver to wrap RSB in a device-model I2C driver.
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The description was borrowed from kernel. "tristate" type was changed
to "bool" (I believe we don't support modules for u-boot yet, right?).
CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along
as well.
Definitions were added to defconfig files in a way that
"make savedefconfig" generates exactly the same file as used defconfig.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Add zynq_zc702 conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
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This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.
This StratixV support will be used by the theadorable board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are
other non-DM drivers that might be used on these platforms. But this
patch creates a new DM driver. Which will be used by all Armada XP/38x
boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they
support DM as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Armada 38x has a maximum of two cores. Probably copy/paste
bug from Armada XP.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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The 2nd usb controller on sun4i/sun7i has its base address 0x8000
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
are interleaved with the ohci clk-gates introducing a hole between
the clks for usb1 and usb2.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The kernel has different compatible strings for the pio block
because the pin-muxing is different on all the different SoCs,
but sunxi_gpio.c only support the basic gpio functionality, which
is identical everywhere. Add the missing compatible strings for
various SoC models.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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selected
The behavior before this patch would attempt to configure the mux
setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS. The
LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27
as in the parallel LCD interface. This patch restricts the
configuration to only the relevant pins 18 to 27 on PORTD.
This was tested on a sun8i A33 tablet with an LVDS screen. MMC1 has
the capability to use pins 2 to 7 on PORTD and the mux on those pins
was being inadvertently set to setting 3 for MMC functionality which
this patch corrects.
Signed-off-by: Lawrence Yu <lyu@micile.com>
[hdegoede@redhat.com: Only apply this change to A23 / A33]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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For ARM32 architecture, CONFIG_DEBUG_LL is available for early
low-level debugging (and actually UniPhier 32bit SoCs use it), but
ARM64 architecture does not support it. Instead, CONFIG_DEBUG_UART
is available as an architecture-independent debug facility.
This commit supports it on all the UniPhier SoCs (including the new
ARMv8 SoCs), which is very useful for new SoC bringups.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long. It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family. Also, rename files for consistency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The 64-bit compiler (ex. aarch64) emits "warning: cast from pointer
to integer of different size".
Make it work with 64bit DMA address while I am here.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Stephen Warren <swaren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Fixup MPC8641HPCN* and r2dplus configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since the firmware always sets up the uart (default
115200 output unless the user changes it), we can just skip our own
uart init to simplify the boot process and more reliably get serial
output.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
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Return value of get_mc_boot_status() in case of failure is not necessary
to be -1.
So update the error condition check.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: Yao Yuan <yao.yuan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch integrate DPAA2 ethernet driver existing PHY framework.
Call phy_connect and phy_config as per available DPMAC id defined
in SerDes Protcol.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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During initial DDR training, false parity errors may be detected.
This patch adds workaround to fix the erratum.
Tested on LS2085QDS and LS2080RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Structures are defined for PDB (Protocol Data Blcks) for various
operations. These structure will be used to add PDB data while
creating the PDB descriptors.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Construct APIs are added to create Protocol Descriptors for
CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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When CAAM runs a descriptor and an error occurs, a non-zero
value is set in Output Status Register. The if condition should
check the status for a non-zero value.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
Add test into xhci_submit_control_message for usb requesttype in USB
vendor request being of standardized type. This fixes detection of
certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized
requesttype in USB vendor request will be ignored.
Signed-off-by: Ted Chen <tedchen@realtek.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
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Driver model is used for host device block devices now, so we don't need the
old code. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
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When 'usb start' is used, block devices are created for any USB flash sticks
and disks, etc. When 'usb stop' is used, these block devices are currently
not removed.
We don't want old block devices hanging around since they can still be
visible to U-Boot. Therefore, when USB is shut down, remove and unbind all
the block devices created by the USB subsystem.
Possibly we should unbind all devices which don't cause problems by being
unbound. Most likely we can remove everything except USB controllers, hubs
and emulators. We can consider that later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
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reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a video driver for Intel's broadwell integrated graphics controller.
This uses a binary blob for most init, with the driver just performing a few
basic tasks.
This driver supports VESA as the mode-setting mechanism. Since most boards
don't support driver model yet with VESA, a special case is added to the
Kconfig for broadwell. Eventually all boards will use driver model and this
can be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
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Add a GPIO driver for the GPIO peripheral found on broadwell devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
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We don't need this anymore - we can use device tree and the new pinconfig
driver instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Rather than setting up the pin configuration in the GPIO driver, use the
new pinctrl driver to do it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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At present on x86 machines with use cache-as-RAM, the memory goes away just
before board_init_r() is called. This means that serial drivers are
no-longer unavailable, until initr_dm() it called, etc.
Any attempt to use printf() within this period will cause a hang.
To fix this, mark the serial devices as 'unavailable' when it is no-longer
available. Bring it back when serial_initialize() is called. This means that
the debug UART will be used instead for this period.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Add one more step into the init sequence. This fixes the keyboard on samus,
which otherwise does not work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
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If the device cannot be probed, syscon_get_by_driver_data() will still
return a useful value in its devp parameter. Ensure that it returns NULL
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO
is probed. However, it assumes that the first GPIO to be probed is in the
first GPIO bank. If this is not the case then the init will write to the
wrong registers.
Fix this. Also add a note that this code is deprecated. We should move to
using device tree instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Some functions do not change the struct gpio_desc parameter. Update these to
use const so this is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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