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Diffstat (limited to 'arch/arm/cpu/arm926ejs/mxs/mxs.c')
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxs.c65
1 files changed, 1 insertions, 64 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index e2b41965db..a5e388b5ad 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -30,7 +30,7 @@
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/dma.h>
+#include <asm/imx-common/dma.h>
#include <asm/arch/gpio.h>
#include <asm/arch/iomux.h>
#include <asm/arch/imx-regs.h>
@@ -39,12 +39,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* 1 second delay should be plenty of time for block reset. */
-#define RESET_MAX_TIMEOUT 1000000
-
-#define MXS_BLOCK_SFTRST (1 << 31)
-#define MXS_BLOCK_CLKGATE (1 << 30)
-
/* Lowlevel init isn't used on i.MX28, so just have a dummy here */
inline void lowlevel_init(void) {}
@@ -82,63 +76,6 @@ void enable_caches(void)
#endif
}
-int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned
- int timeout)
-{
- while (--timeout) {
- if ((readl(&reg->reg) & mask) == mask)
- break;
- udelay(1);
- }
-
- return !timeout;
-}
-
-int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned
- int timeout)
-{
- while (--timeout) {
- if ((readl(&reg->reg) & mask) == 0)
- break;
- udelay(1);
- }
-
- return !timeout;
-}
-
-int mxs_reset_block(struct mxs_register_32 *reg)
-{
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
- return 1;
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
-
- /* Set SFTRST */
- writel(MXS_BLOCK_SFTRST, &reg->reg_set);
-
- /* Wait for CLKGATE being set */
- if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
- return 1;
-
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
- return 1;
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
- return 1;
-
- return 0;
-}
-
void mx28_fixup_vt(uint32_t start_addr)
{
uint32_t *vt = (uint32_t *)0x20;