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authorYork Sun <yorksun@freescale.com>2013-03-25 07:40:14 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:13 -0500
commite1379b0730fcef15e6e77305a56f35912697409c (patch)
treee147385f3ae661a182b9002cf27356db22b57284 /board
parent16d88f415ab799287672ae6cd08bf3ce975de2b5 (diff)
powerpc/t4qds: Add SW7[4] in the DIP switch display
SW7[4] is the new bit which controls the mapping of eMMC vs SDHC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/t4qds/t4qds.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index b48855e492..f0f280b253 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -801,7 +801,7 @@ void qixis_dump_switch(void)
* Any bit with 1 means that bit cannot be reverse engineered.
* It will be displayed as _ in binary format.
*/
- static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xdf, 0x3f, 0x1f};
+ static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xcf, 0x3f, 0x1f};
char buf[10];
u8 brdcfg[16], dutcfg[16];
@@ -832,7 +832,8 @@ void qixis_dump_switch(void)
sw[5] = ((brdcfg[0] & 0x0f) << 4) | \
((QIXIS_READ(rst_ctl) & 0x30) >> 2) | \
((brdcfg[0] & 0x40) >> 5);
- sw[6] = (brdcfg[11] & 0x20);
+ sw[6] = (brdcfg[11] & 0x20) |
+ ((brdcfg[5] & 0x02) << 3);
sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | \
((brdcfg[5] & 0x10) << 2);
sw[8] = ((brdcfg[12] & 0x08) << 4) | \