twl4030: make twl4030_i2c_write_u8 prototype consistent

u-boot standard i2c register write prototype is
i2c_reg_write(u8 addr, u8 reg, u8 val)

twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val)

Signed-off-by: Nishanth Menon <nm@ti.com>

3 files changed, 30 insertions, 29 deletions

diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c
index 84c36bafb4..87d73546a2 100644
--- a/board/cm_t35/cm_t35.c
+++ b/board/cm_t35/cm_t35.c
@@ -493,17 +493,17 @@ static void setup_net_chip_gmpc(void)
 static void reset_net_chip(void)
 {
 	/* Set GPIO1 of TPS65930 as output */
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02,
-				TWL4030_BASEADD_GPIO + 0x03);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x03,
+			     0x02);
 	/* Send a pulse on the GPIO pin */
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02,
-				TWL4030_BASEADD_GPIO + 0x0C);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C,
+			     0x02);
 	udelay(1);
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02,
-				TWL4030_BASEADD_GPIO + 0x09);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x09,
+			     0x02);
 	mdelay(40);
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02,
-				TWL4030_BASEADD_GPIO + 0x0C);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C,
+			     0x02);
 	mdelay(1);
 }
 #else
@@ -600,10 +600,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 	twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, &val, offset);
 	/* Set GPIO6 and GPIO7 of TPS65930 as output */
 	val |= 0xC0;
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, val, offset);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, val);
 	offset = TWL4030_BASEADD_GPIO + TWL4030_GPIO_SETGPIODATAOUT1;
 	/* Take both PHYs out of reset */
-	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0xC0, offset);
+	twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, 0xC0);
 	udelay(1);
 
 	return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 48eb65f896..860d52da3f 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -332,10 +332,10 @@ void *video_hw_init(void)
 static void twl4030_regulator_set_mode(u8 id, u8 mode)
 {
 	u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
-	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, msg >> 8,
-			TWL4030_PM_MASTER_PB_WORD_MSB);
-	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, msg & 0xff,
-			TWL4030_PM_MASTER_PB_WORD_LSB);
+	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
+			     TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
+	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
+			     TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
 }
 
 static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
@@ -410,8 +410,8 @@ int misc_init_r(void)
 			TWL4030_PM_MASTER_PB_CFG);
 
 	/* enable I2C access to powerbus (needed for twl4030 regulator) */
-	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 0x02,
-			TWL4030_PM_MASTER_PB_CFG);
+	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
+			     0x02);
 
 	/* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
 	twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
@@ -419,8 +419,8 @@ int misc_init_r(void)
 	twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
 
 	/* restore I2C access state */
-	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, state,
-			TWL4030_PM_MASTER_PB_CFG);
+	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
+			     state);
 
 	/* set env variable attkernaddr for relocated kernel */
 	sprintf(buf, "%#x", KERNEL_ADDRESS);
@@ -481,8 +481,8 @@ void hw_watchdog_reset(void)
 	/* timeout 0 means watchdog is disabled */
 	/* reset watchdog timeout to 31s (maximum) */
 	if (timeout != 0)
-		twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 31,
-				TWL4030_PM_RECEIVER_WATCHDOG_CFG);
+		twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
+				     TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
 
 	/* store last watchdog reset time */
 	twl_wd_time = get_timer(0);
@@ -541,18 +541,18 @@ int rx51_kp_init(void)
 	ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
 	ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
 	ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
-	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, ctrl,
-				TWL4030_KEYPAD_KEYP_CTRL_REG);
+	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+				    TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
 	/* enable key event status */
-	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0xfe,
-				TWL4030_KEYPAD_KEYP_IMR1);
+	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+				    TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
 	/* enable interrupt generation on rising and falling */
 	/* this is a workaround for qemu twl4030 emulation */
-	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x57,
-				TWL4030_KEYPAD_KEYP_EDR);
+	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+				    TWL4030_KEYPAD_KEYP_EDR, 0x57);
 	/* enable ISR clear on read */
-	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x05,
-				TWL4030_KEYPAD_KEYP_SIH_CTRL);
+	ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+				    TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
 	return 0;
 }
 
diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c
index 9ff5dd7664..5f0c58d8d2 100644
--- a/board/pandora/pandora.c
+++ b/board/pandora/pandora.c
@@ -114,8 +114,9 @@ int misc_init_r(void)
 
 	/* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
 	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
+		TWL4030_PM_RECEIVER_BB_CFG,
 		TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
-		TWL4030_BB_CFG_BBISEL_500UA, TWL4030_PM_RECEIVER_BB_CFG);
+		TWL4030_BB_CFG_BBISEL_500UA);
 
 	dieid_num_r();