diff options
author | Dirk Eibach <dirk.eibach@gdsys.cc> | 2015-10-28 16:44:15 +0100 |
---|---|---|
committer | Klaus Goger <klaus.goger@theobroma-systems.com> | 2016-09-18 12:38:56 +0200 |
commit | 4a1245b55c1ec0eeca6658dc070555d02bad293d (patch) | |
tree | e33a738eba8f6979a44dea3d83da762d21055f0c | |
parent | ea81fd0b895db8d90bcf3da01425ad7bb06b12de (diff) |
arm: mvebu: Fix ddr3_init() cpu config
Armada 38x has a maximum of two cores. Probably copy/paste
bug from Armada XP.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | drivers/ddr/marvell/a38x/ddr3_init.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c index 556f877039..ee05f57f43 100644 --- a/drivers/ddr/marvell/a38x/ddr3_init.c +++ b/drivers/ddr/marvell/a38x/ddr3_init.c @@ -305,8 +305,6 @@ int ddr3_init(void) SAR1_CPU_CORE_OFFSET; switch (soc_num) { case 0x3: - reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); - reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); case 0x1: reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); case 0x0: |