From 071fb4cbe01cb418264143cf49612a8d23cfaf4e Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Mon, 7 Oct 2013 10:38:41 -0500 Subject: ARM: socfpga: dts: Move common nodes to cyclone5 dtsi The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other SoC+FPGA combinations. Instead of having to describe all Cyclone5 common nodes in every board specific dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the Development Kit. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_cyclone5.dtsi | 65 +++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_cyclone5.dtsi (limited to 'arch/arm/boot/dts/socfpga_cyclone5.dtsi') diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi new file mode 100644 index 000000000000..a8716f6dbe2e --- /dev/null +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2012 Altera Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/dts-v1/; +/include/ "socfpga.dtsi" + +/ { + soc { + clkmgr@ffd04000 { + clocks { + osc1 { + clock-frequency = <25000000>; + }; + }; + }; + + ethernet@ff702000 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + status = "okay"; + }; + + timer0@ffc08000 { + clock-frequency = <100000000>; + }; + + timer1@ffc09000 { + clock-frequency = <100000000>; + }; + + timer2@ffd00000 { + clock-frequency = <25000000>; + }; + + timer3@ffd01000 { + clock-frequency = <25000000>; + }; + + serial0@ffc02000 { + clock-frequency = <100000000>; + }; + + serial1@ffc03000 { + clock-frequency = <100000000>; + }; + + sysmgr@ffd08000 { + cpu1-start-addr = <0xffd080c4>; + }; + }; +}; -- cgit v1.2.3