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path: root/drivers/gpu/ipu-v3
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2016-07-12gpu: ipu-v3: ipu-dc: don't bug out on invalid bus_formatPhilipp Zabel
If imx-drm is combined with a bridge or panel that requests an unsupported format, warn and use a default mapping instead of hanging the machine. The worst that can happen here are wrong colors. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-07-12drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpersLiu Ying
Use the drm_plane_helper_update/disable() and drm_helper_crtc_mode_set() transitional atomic helpers. The crtc->mode_set_nofb callback is added so that the primary plane is no longer tied to the CRTC. Check/update logics are separated to make sure crtc->mode_set_nofb and plane->atomic_update are always successful. Also, some necessary logics are tweaked for a smooth transition. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-07-12gpu: ipu-v3: ipu-dmfc: Use static DMFC FIFO allocation mechanismLiu Ying
For all video modes we support currently, we always get 2 slots for a plane by using the current existing dynamic DMFC FIFO allocation mechanism. So, let's change to use the static one to simplify the code. This also makes it easier to implement the atomic mode setting as we don't need to handle allocation failure cases then. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-23drm/imx: Match imx-ipuv3-crtc components using device node in platform dataPhilipp Zabel
The component master driver imx-drm-core matches component devices using their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during probing. Before that, of_node was set and caused an of: modalias to be used instead of the platform: modalias, which broke module autoloading. On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc probe function calls component_add, component matching in imx-drm-core fails. While dev->of_node will be set once the next component tries to bring up the component master, imx-drm-core component binding will never succeed if one of the crtc devices is probed last. Add of_node to the component platform data and match against the pdata->of_node instead of dev->of_node in imx-drm-core to work around this problem. Cc: <stable@vger.kernel.org> # 4.4.x Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
2016-05-05gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloadingPhilipp Zabel
If of_node is set before calling platform_device_add, the driver core will try to use of: modalias matching, which fails because the device tree nodes don't have a compatible property set. This patch fixes imx-ipuv3-crtc module autoloading by setting the of_node property only after the platform modalias is set. Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports") Reported-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-By: Dennis Gilmore <dennis@ausil.us> Cc: stable@vger.kernel.org # 4.4+ Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-03-31gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eotLiu Ying
The function name 'ipu_dmfc_config_wait4eot' matches the implementation of the function better than 'ipu_dmfc_init_channel', since it only touches the wait4eot bits. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-31gpu: ipu-v3: ipu-dmfc: Make function ipu_dmfc_init_channel() return voidLiu Ying
Since the function ipu_dmfc_init_channel() always returns zero, we may change the return type to void to simplify the code. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-31gpu: ipu-v3: ipu-dmfc: Protect function ipu_dmfc_init_channel() with mutexLiu Ying
To avoid race condition issue, we should protect the function ipu_dmfc_init_channel() with the mutex dmfc->priv->mutex, since it configures the register DMFC_GENERAL1 at runtime which contains several control bits for various display channels. This matches better with fine grained locking logic in upper layer. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-31gpu: ipu-cpmem: modify ipu_cpmem_set_yuv_planar_full for better controlPhilipp Zabel
Let ipu_cpmem_set_yuv_planar_full take a DRM_FORMAT instead of a V4L2_PIXFMT and allow better control over U/V stride, U offset and V offset settings in the CPMEM. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-14Merge drm-fixes into drm-next.Dave Airlie
Nouveau wanted this to avoid some worse conflicts when I merge that.
2016-03-01gpu: ipu-v3: ipu-dc: Simplify display controller microcode setupPhilipp Zabel
This cleans up the display controller microcode setup in ipu_dc_init_sync a little bit. The microcode template words for DI0 and DI1 are properly separated to avoid a clash when DI1 is active in interlaced mode at the same time as DI0 in non-interlaced mode. A comment is added to explain the meaning of the sync counter. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-02-10gpu: ipu-v3: Reset IPU before activating IRQDavid Jander
If we don't come out of a clean reset, make sure no IRQ is fired before everything is setup by resetting the IPU before activating the interrupt handlers. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-02-10gpu: ipu-v3: Do not bail out on missing optional port nodesPhilipp Zabel
The port nodes are documented as optional, treat them accordingly. Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Chris Healy <Chris.Healy@zii.aero> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports")
2016-01-11Merge branch 'patchwork' into v4l_for_linusMauro Carvalho Chehab
* patchwork: (204 commits) [media] rc: sunxi-cir: Initialize the spinlock properly [media] rtl2832: do not filter out slave TS null packets [media] rtl2832: print reg number on error case [media] rtl28xxu: return demod reg page from driver cache [media] coda: enable MPEG-2 ES decoding [media] coda: don't start streaming without queued buffers [media] coda: hook up vidioc_prepare_buf [media] coda: relax coda_jpeg_check_buffer for trailing bytes [media] coda: make to_coda_video_device static [media] s5p-mfc: remove volatile attribute from MFC register addresses [media] s5p-mfc: merge together s5p_mfc_hw_call and s5p_mfc_hw_call_void [media] s5p-mfc: use spinlock to protect MFC context [media] s5p-mfc: remove unnecessary callbacks [media] s5p-mfc: make queue cleanup code common [media] s5p-mfc: use one implementation of s5p_mfc_get_new_ctx [media] s5p-mfc: constify s5p_mfc_codec_ops structures [media] au8522: Avoid memory leak for device config data [media] ir-lirc-codec.c: don't leak lirc->drv-rbuf [media] uvcvideo: small cleanup in uvc_video_clock_update() [media] uvcvideo: Fix reading the current exposure value of UVC ...
2015-12-04drm, ipu-v3: use https://linuxtv.org for LinuxTV URLMauro Carvalho Chehab
While https was always supported on linuxtv.org, only in Dec 3 2015 the website is using valid certificates. As we're planning to drop pure http support on some future, change the references at DRM include and at the ipu-v3 driver to point to the https://linuxtv.org URL instead. Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-11-24gpu: ipu-v3: Assign of_node of child platform devices to corresponding portsPhilipp Zabel
The crtc child device driver shouldn't have to modify the of_node of its platform device in the probe function. Instead, let the IPU core driver set the of_node when the platform device is created. Also reorder the client_reg array so the elements are in port id order (CSIs first, then DIs). Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-11-24gpu: ipu-v3: Remove reg_offset fieldPhilipp Zabel
This is not used, so remove it. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-11-05Merge tag 'imx-drm-next-2015-10-30' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next imx-drm fixes and color format updates - Some correctness fixes found by coccinelle - Add drivers/gpu/ipu-v3 directory to MAINTAINERS - Add support for more color formats - Fix a regression, making displays larger than FullHD work again * tag 'imx-drm-next-2015-10-30' of git://git.pengutronix.de/git/pza/linux: drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHD gpu: ipu-v3: fix div_ratio type gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors. drm/imx: enable ARGB4444 16-bit color format gpu: ipu-v3: add support for ARGB4444 16-bit color format drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formats gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formats drm/imx: enable 15-bit RGB with 1-bit alpha formats gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formats MAINTAINERS: Add IPUv3 core driver to the i.MX DRM driver section gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to false
2015-10-30gpu: ipu-v3: fix div_ratio typeAndrzej Hajda
The variable can be negative. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors.Philippe De Muyter
Enable the MEDIA_BUS_FMT_Y8_1X8 format. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for ARGB4444 16-bit color formatLucas Stach
This patch adds support for the ARGB4444 color format. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formatsPhilipp Zabel
This patch adds support for the RGBA8888, RGBX8888, BGRA8888, and BGRX8888 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formatsPhilipp Zabel
This patch adds support for ARGB1555, ABGR1555, RGBA5551, and BGRA5551 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to falseFabio Estevam
Bool initializations should use true and false. Bool tests don't need comparisons. Based on contributions from Joe Perches, Rusty Russell and Bruce W Allan. The semantic patch that makes this change is available in scripts/coccinelle/misc/boolinit.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-06gpu: imx: fix support for interlaced modesRussell King
The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-10-06gpu: imx: simplify sync polarity settingRussell King
Use a function to convert the sync pin to a bit mask for the DI_GENERAL register, and move this out of the interlace/non-interlace path to the common path. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-09-16gpu/drm: Kill off set_irq_flags usageRob Herring
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-04Merge tag 'dmaengine-4.3-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds
Pull dmaengine updates from Vinod Koul: "This time we have aded a new capability for scatter-gathered memset using dmaengine APIs. This is supported in xdmac & hdmac drivers We have added support for reusing descriptors for examples like video buffers etc. Driver will follow The behaviour of descriptor ack has been clarified and documented New devices added are: - dma controller in sun[457]i SoCs - lpc18xx dmamux - ZTE ZX296702 dma controller - Analog Devices AXI-DMAC DMA controller - eDMA support for dma-crossbar - imx6sx support in imx-sdma driver - imx-sdma device to device support Other: - jz4780 fixes - ioatdma large refactor and cleanup for removal of ioat v1 and v2 which is deprecated and fixes - ACPI support in X-Gene DMA engine driver - ipu irq fixes - mvxor fixes - minor fixes spread thru drivers" [ The Kconfig and Makefile entries got re-sorted alphabetically, and I handled the conflict with the new Intel integrated IDMA driver by slightly mis-sorting it on purpose: "IDMA64" got sorted after "IMX" in order to keep the Intel entries together. I think it might be a good idea to just rename the IDMA64 config entry to INTEL_IDMA64 to make the sorting be a true sort, not this mismash. Also, this merge disables the COMPILE_TEST for the sun4i DMA controller, because it does not compile cleanly at all. - Linus ] * tag 'dmaengine-4.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (89 commits) dmaengine: ioatdma: add Broadwell EP ioatdma PCI dev IDs dmaengine :ipu: change ipu_irq_handler() to remove compile warning dmaengine: ioatdma: Fix variable array length dmaengine: ioatdma: fix sparse "error" with prep lock dmaengine: hdmac: Add memset capabilities dmaengine: sort the sh Makefile dmaengine: sort the sh Kconfig dmaengine: sort the dw Kconfig dmaengine: sort the Kconfig dmaengine: sort the makefile drivers/dma: make mv_xor.c driver explicitly non-modular dmaengine: Add support for the Analog Devices AXI-DMAC DMA controller devicetree: Add bindings documentation for Analog Devices AXI-DMAC dmaengine: xgene-dma: Fix the lock to allow client for further submission of requests dmaengine: ioatdma: fix coccinelle warning dmaengine: ioatdma: fix zero day warning on incompatible pointer type dmaengine: tegra-apb: Simplify locking for device using global pause dmaengine: tegra-apb: Remove unnecessary return statements and variables dmaengine: tegra-apb: Avoid unnecessary channel base address calculation dmaengine: tegra-apb: Remove unused variables ...
2015-07-16dmaengine: ipu: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. This is also a preparation for the removal of the 'irq' argument from interrupt flow handlers. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: dmaengine@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-07-10GPU: ipu: fix lockup caused by pending chained interruptsRussell King
Even with the oops fixed by a previous patch, the system still fails to kexec, due to a stuck chained interrupt locking the system. We must disable the child interrupts prior to setting up the irq chip to ensure we don't get stuck here. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-06-18GPU: ipu: Fix race in installing IPU chained IRQ handlerRussell King
The IPU code was installing its chained interrupt handler (which enables the interrupt) before it was setting its data, which provokes an oops on kexec. Fix this by converting to irq_set_chained_handler_and_data(). [drm] Initialized drm 1.1.0 20060810 imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available Unable to handle kernel NULL pointer dereference at virtual address 00000070 pgd = c0004000 [00000070] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.0-rc6+ #1693 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) task: d74c0000 ti: d74aa000 task.ti: d74aa000 PC is at ipu_irq_handle+0x28/0xd8 LR is at ipu_irq_handler+0x6c/0xc0 pc : [<c03c56d8>] lr : [<c03c58a4>] psr: 200001d3 sp : d74abbd0 ip : d74abc00 fp : d74abbfc r10: 000001e0 r9 : c0085154 r8 : 00000009 r7 : 00000000 r6 : 00000000 r5 : d74abc04 r4 : c0a6b6a8 r3 : 00000000 r2 : 00000009 r1 : d74abc04 r0 : 00000000 Flags: nzCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 10004059 DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xd74aa210) Stack: (0xd74abbd0 to 0xd74ac000) Backtrace: [<c03c56b0>] (ipu_irq_handle) from [<c03c58a4>] (ipu_irq_handler+0x6c/0xc0) [<c03c5838>] (ipu_irq_handler) from [<c0080154>] (generic_handle_irq+0x28/0x38) [<c008012c>] (generic_handle_irq) from [<c0080288>] (__handle_domain_irq+0x5c/0xb8) [<c008022c>] (__handle_domain_irq) from [<c0009428>] (gic_handle_irq+0x28/0x68) [<c0009400>] (gic_handle_irq) from [<c0013dc4>] (__irq_svc+0x44/0x5c) [<c07638fc>] (_raw_spin_unlock_irqrestore) from [<c00803bc>] (__irq_put_desc_unlock+0x1c/0x40) [<c00803a0>] (__irq_put_desc_unlock) from [<c00841f4>] (__irq_set_handler+0x54/0x5c) [<c00841a0>] (__irq_set_handler) from [<c03c5f48>] (ipu_probe+0x29c/0x708) [<c03c5cac>] (ipu_probe) from [<c03d3848>] (platform_drv_probe+0x50/0xac) [<c03d37f8>] (platform_drv_probe) from [<c03d1f3c>] (driver_probe_device+0x1d4/0x278) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4z02-0002SI-Br@rmk-PC.arm.linux.org.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-04-13Merge tag 'imx-drm-next-2015-03-31' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next imx-drm changes to use media bus formats and LDB drm_panel support - Add media bus formats needed by imx-drm - Switch to use media bus formats to describe the pixel format on the internal parallel bus between display interface and encoders - Some preparations for TV Output via TVEv2 on i.MX5 - Add drm_panel support to the i.MX LVDS driver, allow to determine the bus pixel format from the panel descriptor. * tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux: drm/imx: imx-ldb: allow to determine bus format from the connected panel drm/imx: imx-ldb: reset display clock input when disabling LVDS drm/imx: imx-ldb: add drm_panel support drm/imx: consolidate bus format variable names drm/imx: switch to use media bus formats Add RGB666_1X24_CPADHI media bus format Add YUV8_1X24 media bus format Add BGR888_1X24 and GBR888_1X24 media bus formats Add LVDS RGB media bus formats Add RGB444_1X12 and RGB565_1X16 media bus formats drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2 drm/imx: Add support for interlaced scanout
2015-03-31gpu: ipu-v3: turns out the IPU can only downsize 4:1Philipp Zabel
The value for downsizing 8:1 is marked as reserved in the technical reference manual and the documentation states downsizing capability up to 4:1 only. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31gpu: ipu-v3: limit pixel clock divider to 8-bitsPhilipp Zabel
The DI pixel clock divider bit field is only 8 bits wide for the integer part, so limit the divider to the 1...255 interval before deciding whether the internal clock can be used and before writing to the register. Reported-by: Felix Mellmann <felix.mellmann@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31drm/imx: consolidate bus format variable namesPhilipp Zabel
This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt, and pixfmt variables to a common name "bus_format" wherever they describe the pixel format on the bus between display controller and encoder hardware. At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-03-31drm/imx: switch to use media bus formatsPhilipp Zabel
imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to describe the pixel format of frame buffers in memory, to describe the pixel format on the bus between the display controller and the encoder hardware. Now that MEDIA_BUS_FMT constants are available to drm drivers, use those instead. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-02-23gpu: ipu-v3: do not divide by zero if the pixel clock is too largePhilipp Zabel
Even if an unsupported mode with a pixel clock larger than two times the 264 MHz IPU HSP clock is set, don't divide by zero. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-11Merge tag 'imx-drm-fixes-2015-01-28' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE - Corrected handling of wait_for_completion_timeout return value when disabling IPUv3 DC channels - Fixed error return value propagation in TVE mode_set - Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53 * tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Fix IC control register offset drm: imx: imx-tve: Check and propagate the errors gpu: ipu-v3: wait_for_completion_timeout does not return negative status
2015-01-27gpu: ipu-v3: Fix IC control register offsetPhilipp Zabel
The IC register offset is at +0x20000 relative to the control module registers on all IPUv3 versions. This patch fixes wrong values for i.MX51 and i.MX53. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-27gpu: ipu-v3: wait_for_completion_timeout does not return negative statusNicholas Mc Guire
This fixes up the return value handling and the return type. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calcSteve Longerbeam
We can use the DIV_ROUND_CLOSEST() macro when calculating the DI clock divider, rounded to nearest int. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfgSteve Longerbeam
This patch changes struct ipu_di_signal_cfg to use struct videomode to define video timings and flags. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: remove some non-functional codeSteve Longerbeam
h_total and v_total were calculated in ipu_di_init_sync_panel() but never actually used. Remove. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: Add ipu_di_adjust_videomode()Jiada Wang
On some monitors, high resolution modes are not working, exhibiting pixel column truncation problems (for example, 1280x1024 displays as 1280x1022). The function ipu_di_adjust_videomode() aims to fix these issues by adjusting a passed videomode to IPU restrictions. The function can be called from the drm_crtc_helper_funcs->mode_fixup() methods. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Deepak Das <deepak_das@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-06gpu: ipu-v3: Implement use counter for ipu_dc_enable(), ipu_dc_disable()Steve Longerbeam
The functions ipu_dc_enable() and ipu_dc_disable() enable/disable the DC globally in the IPU_CONF register, but the DC is used by multiple clients on different DC channels. So make sure to only disable/enable the DC globally based on a use counter. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-11-14[media] gpu: ipu-v3: Make use of media_bus_format enumBoris BREZILLON
In order to have subsytem agnostic media bus format definitions we've moved media bus definition to include/uapi/linux/media-bus-format.h and prefixed enum values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT. Reference new definitions in the ipu-v3 driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2014-10-07Merge tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux into ↵Dave Airlie
drm-next IPUv3 fixes for v3.18 * tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE Kconfig gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined gpu: ipu-v3: Return proper error on ipu_add_client_devices error path gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
2014-09-24gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE KconfigFabio Estevam
SOC_IMX6SL does not have the IPU block, so remove it from the Kconfig entry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_dump()Steve Longerbeam
Adds ipu_dump() which dumps IPU register state to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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