diff options
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 50a318260e5a..b86ac490a9ad 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -47,6 +47,7 @@ #include "skeleton64.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -388,6 +389,14 @@ "mmc3_sample"; }; + gpadc_clk: clk@0600050c { + #clock-cells = <1>; + compatible = "allwinner,sun9i-a80-mod0-clk"; + reg = <0x0600050c 0x4>; + clocks = <&osc24M>; + clock-output-names = "gpadc"; + }; + ahb0_gates: clk@06000580 { #clock-cells = <1>; compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; @@ -1003,6 +1012,23 @@ }; }; + tsc: tsc@6004c40 { + #thermal-sensor-cells = <1>; + compatible = "allwinner,sun9i-tsc"; + reg = <0x06004c40 0x50>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + resets = <&apb0_resets 17>; + clocks = <&apb0_gates 17>, <&gpadc_clk 0>; + clock-names = "ahb", "mod"; + assigned-clocks = <&gpadc_clk 0>; + assigned-clock-rates = <1000000>; + + allwinner,sun9i-tsc-channels = <4>; + allwinner,sun9i-tsc-name = "c1cpux", "dramc", "gpu", "c0cpux"; + allwinner,sun9i-tsc-multiplier = <1000>; + allwinner,sun9i-tsc-offset = <(-2794000)>; + allwinner,sun9i-tsc-divisor = <(-14882)>; + }; }; uart0: serial@07000000 { |