diff options
author | Chen-Yu Tsai <wens@csie.org> | 2015-05-14 11:29:54 +0800 |
---|---|---|
committer | Klaus Goger <klaus.goger@theobroma-systems.com> | 2016-09-18 15:46:42 +0200 |
commit | 365991b9f2d071157a0e4173538d39aa24fda1ef (patch) | |
tree | d5cdd99f7cf2cdd1b9c7a3807662a1fc20612e30 | |
parent | 116b87cbbfaf100742fdbe7165b07f1485bbea9d (diff) |
ARM: dts: sun9i: Add PRCM device node for the A80 dtsi
The PRCM is a collection of clock controls, reset controls, and various
power switches/gates. Some of these can be independently listed and
supported, while a number of CPU related ones are used in tandem with
CPUCFG for SMP bringup and CPU hotplugging.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 42ab52c26c7b..db937aa67789 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -976,6 +976,11 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; }; + prcm@08001400 { + compatible = "allwinner,sun9i-a80-prcm"; + reg = <0x08001400 0x200>; + }; + apbs_rst: reset@080014b0 { reg = <0x080014b0 0x4>; compatible = "allwinner,sun6i-a31-clock-reset"; |