1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
|
; RUN: llc < %s -mtriple=aarch64-eabi | FileCheck %s
; Convert mul x, pow2 to shift.
; Convert mul x, pow2 +/- 1 to shift + add/sub.
; Convert mul x, (pow2 + 1) * pow2 to shift + add + shift.
; Lowering other positive constants are not supported yet.
define i32 @test2(i32 %x) {
; CHECK-LABEL: test2
; CHECK: lsl w0, w0, #1
%mul = shl nsw i32 %x, 1
ret i32 %mul
}
define i32 @test3(i32 %x) {
; CHECK-LABEL: test3
; CHECK: add w0, w0, w0, lsl #1
%mul = mul nsw i32 %x, 3
ret i32 %mul
}
define i32 @test4(i32 %x) {
; CHECK-LABEL: test4
; CHECK: lsl w0, w0, #2
%mul = shl nsw i32 %x, 2
ret i32 %mul
}
define i32 @test5(i32 %x) {
; CHECK-LABEL: test5
; CHECK: add w0, w0, w0, lsl #2
%mul = mul nsw i32 %x, 5
ret i32 %mul
}
define i32 @test6_32b(i32 %x) {
; CHECK-LABEL: test6
; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
; CHECK: lsl w0, {{w[0-9]+}}, #1
%mul = mul nsw i32 %x, 6
ret i32 %mul
}
define i64 @test6_64b(i64 %x) {
; CHECK-LABEL: test6_64b
; CHECK: add {{x[0-9]+}}, x0, x0, lsl #1
; CHECK: lsl x0, {{x[0-9]+}}, #1
%mul = mul nsw i64 %x, 6
ret i64 %mul
}
; mul that appears together with add, sub, s(z)ext is not supported to be
; converted to the combination of lsl, add/sub yet.
define i64 @test6_umull(i32 %x) {
; CHECK-LABEL: test6_umull
; CHECK: umull x0, w0, {{w[0-9]+}}
%ext = zext i32 %x to i64
%mul = mul nsw i64 %ext, 6
ret i64 %mul
}
define i64 @test6_smull(i32 %x) {
; CHECK-LABEL: test6_smull
; CHECK: smull x0, w0, {{w[0-9]+}}
%ext = sext i32 %x to i64
%mul = mul nsw i64 %ext, 6
ret i64 %mul
}
define i32 @test6_madd(i32 %x, i32 %y) {
; CHECK-LABEL: test6_madd
; CHECK: madd w0, w0, {{w[0-9]+}}, w1
%mul = mul nsw i32 %x, 6
%add = add i32 %mul, %y
ret i32 %add
}
define i32 @test6_msub(i32 %x, i32 %y) {
; CHECK-LABEL: test6_msub
; CHECK: msub w0, w0, {{w[0-9]+}}, w1
%mul = mul nsw i32 %x, 6
%sub = sub i32 %y, %mul
ret i32 %sub
}
define i64 @test6_umaddl(i32 %x, i64 %y) {
; CHECK-LABEL: test6_umaddl
; CHECK: umaddl x0, w0, {{w[0-9]+}}, x1
%ext = zext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%add = add i64 %mul, %y
ret i64 %add
}
define i64 @test6_smaddl(i32 %x, i64 %y) {
; CHECK-LABEL: test6_smaddl
; CHECK: smaddl x0, w0, {{w[0-9]+}}, x1
%ext = sext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%add = add i64 %mul, %y
ret i64 %add
}
define i64 @test6_umsubl(i32 %x, i64 %y) {
; CHECK-LABEL: test6_umsubl
; CHECK: umsubl x0, w0, {{w[0-9]+}}, x1
%ext = zext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%sub = sub i64 %y, %mul
ret i64 %sub
}
define i64 @test6_smsubl(i32 %x, i64 %y) {
; CHECK-LABEL: test6_smsubl
; CHECK: smsubl x0, w0, {{w[0-9]+}}, x1
%ext = sext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%sub = sub i64 %y, %mul
ret i64 %sub
}
define i64 @test6_umnegl(i32 %x) {
; CHECK-LABEL: test6_umnegl
; CHECK: umnegl x0, w0, {{w[0-9]+}}
%ext = zext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%sub = sub i64 0, %mul
ret i64 %sub
}
define i64 @test6_smnegl(i32 %x) {
; CHECK-LABEL: test6_smnegl
; CHECK: smnegl x0, w0, {{w[0-9]+}}
%ext = sext i32 %x to i64
%mul = mul nsw i64 %ext, 6
%sub = sub i64 0, %mul
ret i64 %sub
}
define i32 @test7(i32 %x) {
; CHECK-LABEL: test7
; CHECK: lsl {{w[0-9]+}}, w0, #3
; CHECK: sub w0, {{w[0-9]+}}, w0
%mul = mul nsw i32 %x, 7
ret i32 %mul
}
define i32 @test8(i32 %x) {
; CHECK-LABEL: test8
; CHECK: lsl w0, w0, #3
%mul = shl nsw i32 %x, 3
ret i32 %mul
}
define i32 @test9(i32 %x) {
; CHECK-LABEL: test9
; CHECK: add w0, w0, w0, lsl #3
%mul = mul nsw i32 %x, 9
ret i32 %mul
}
define i32 @test10(i32 %x) {
; CHECK-LABEL: test10
; CHECK: add {{w[0-9]+}}, w0, w0, lsl #2
; CHECK: lsl w0, {{w[0-9]+}}, #1
%mul = mul nsw i32 %x, 10
ret i32 %mul
}
define i32 @test11(i32 %x) {
; CHECK-LABEL: test11
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, 11
ret i32 %mul
}
define i32 @test12(i32 %x) {
; CHECK-LABEL: test12
; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
; CHECK: lsl w0, {{w[0-9]+}}, #2
%mul = mul nsw i32 %x, 12
ret i32 %mul
}
define i32 @test13(i32 %x) {
; CHECK-LABEL: test13
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, 13
ret i32 %mul
}
define i32 @test14(i32 %x) {
; CHECK-LABEL: test14
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, 14
ret i32 %mul
}
define i32 @test15(i32 %x) {
; CHECK-LABEL: test15
; CHECK: lsl {{w[0-9]+}}, w0, #4
; CHECK: sub w0, {{w[0-9]+}}, w0
%mul = mul nsw i32 %x, 15
ret i32 %mul
}
define i32 @test16(i32 %x) {
; CHECK-LABEL: test16
; CHECK: lsl w0, w0, #4
%mul = mul nsw i32 %x, 16
ret i32 %mul
}
; Convert mul x, -pow2 to shift.
; Convert mul x, -(pow2 +/- 1) to shift + add/sub.
; Lowering other negative constants are not supported yet.
define i32 @ntest2(i32 %x) {
; CHECK-LABEL: ntest2
; CHECK: neg w0, w0, lsl #1
%mul = mul nsw i32 %x, -2
ret i32 %mul
}
define i32 @ntest3(i32 %x) {
; CHECK-LABEL: ntest3
; CHECK: sub w0, w0, w0, lsl #2
%mul = mul nsw i32 %x, -3
ret i32 %mul
}
define i32 @ntest4(i32 %x) {
; CHECK-LABEL: ntest4
; CHECK:neg w0, w0, lsl #2
%mul = mul nsw i32 %x, -4
ret i32 %mul
}
define i32 @ntest5(i32 %x) {
; CHECK-LABEL: ntest5
; CHECK: add {{w[0-9]+}}, w0, w0, lsl #2
; CHECK: neg w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -5
ret i32 %mul
}
define i32 @ntest6(i32 %x) {
; CHECK-LABEL: ntest6
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -6
ret i32 %mul
}
define i32 @ntest7(i32 %x) {
; CHECK-LABEL: ntest7
; CHECK: sub w0, w0, w0, lsl #3
%mul = mul nsw i32 %x, -7
ret i32 %mul
}
define i32 @ntest8(i32 %x) {
; CHECK-LABEL: ntest8
; CHECK: neg w0, w0, lsl #3
%mul = mul nsw i32 %x, -8
ret i32 %mul
}
define i32 @ntest9(i32 %x) {
; CHECK-LABEL: ntest9
; CHECK: add {{w[0-9]+}}, w0, w0, lsl #3
; CHECK: neg w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -9
ret i32 %mul
}
define i32 @ntest10(i32 %x) {
; CHECK-LABEL: ntest10
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -10
ret i32 %mul
}
define i32 @ntest11(i32 %x) {
; CHECK-LABEL: ntest11
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -11
ret i32 %mul
}
define i32 @ntest12(i32 %x) {
; CHECK-LABEL: ntest12
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -12
ret i32 %mul
}
define i32 @ntest13(i32 %x) {
; CHECK-LABEL: ntest13
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -13
ret i32 %mul
}
define i32 @ntest14(i32 %x) {
; CHECK-LABEL: ntest14
; CHECK: mul w0, w0, {{w[0-9]+}}
%mul = mul nsw i32 %x, -14
ret i32 %mul
}
define i32 @ntest15(i32 %x) {
; CHECK-LABEL: ntest15
; CHECK: sub w0, w0, w0, lsl #4
%mul = mul nsw i32 %x, -15
ret i32 %mul
}
define i32 @ntest16(i32 %x) {
; CHECK-LABEL: ntest16
; CHECK: neg w0, w0, lsl #4
%mul = mul nsw i32 %x, -16
ret i32 %mul
}
|
