From d993b016d170e441de08153dfc349dbaafe44826 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 30 Nov 2017 18:48:35 +0000 Subject: [globalisel][tablegen] Add support for specific immediates in the match pattern This enables a few rules such as ARM's uxtb instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319457 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/GlobalISelEmitter.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'utils') diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp index f82b2fd3e9b..d9048c231c2 100644 --- a/utils/TableGen/GlobalISelEmitter.cpp +++ b/utils/TableGen/GlobalISelEmitter.cpp @@ -2812,6 +2812,14 @@ Expected GlobalISelEmitter::importExplicitUseRenderer( return failedImport("Dst pattern child isn't a leaf node or an MBB" + llvm::to_string(*DstChild)); } + // It could be a specific immediate in which case we should just check for + // that immediate. + if (const IntInit *ChildIntInit = + dyn_cast(DstChild->getLeafValue())) { + DstMIBuilder.addRenderer(ChildIntInit->getValue()); + return InsertPt; + } + // Otherwise, we're looking for a bog-standard RegisterClass operand. if (auto *ChildDefInit = dyn_cast(DstChild->getLeafValue())) { auto *ChildRec = ChildDefInit->getDef(); -- cgit v1.2.3