From cc0c5b9ce0d5cbf5e8af2b1a7d8f653e88833b7c Mon Sep 17 00:00:00 2001 From: Wouter van Oortmerssen Date: Fri, 27 Jul 2018 20:56:43 +0000 Subject: [WebAssembly] Added default stack-only instruction mode for MC. Summary: Moved Explicit Locals pass to last. Made that pass obligatory. Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D49160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338164 91177308-0d34-0410-b5e6-96231b3b80d8 --- unittests/MC/Disassembler.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'unittests') diff --git a/unittests/MC/Disassembler.cpp b/unittests/MC/Disassembler.cpp index 0a6871f6f85..ca9581af83a 100644 --- a/unittests/MC/Disassembler.cpp +++ b/unittests/MC/Disassembler.cpp @@ -101,7 +101,7 @@ TEST(Disassembler, WebAssemblyTest) { InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString, OutStringSize); EXPECT_EQ(InstSize, 3U); - EXPECT_EQ(StringRef(OutString), "\ti64.load32_u\t16, :p2align=1"); + EXPECT_EQ(StringRef(OutString), "\ti64.load32_u\t16:p2align=1"); LLVMDisasmDispose(DCR); } -- cgit v1.2.3