From f48ff4c85ec91f7ba5eaa724079542a2016e55b2 Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Tue, 30 Jan 2018 11:17:13 +0000 Subject: Merging r323355: ------------------------------------------------------------------------ r323355 | nha | 2018-01-24 19:02:05 +0100 (Wed, 24 Jan 2018) | 9 lines Revert r321751, "StructurizeCFG: Fix broken backedge detection" It causes regressions in various OpenGL test suites. Keep the test cases introduced by r321751 as XFAIL, and add a test case for the regression. Change-Id: I90b4cc354f68cebe5fcef1f2422dc8fe1c6d3514 Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=36015 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323749 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../StructurizeCFG/AMDGPU/backedge-id-bug.ll | 1 + test/Transforms/StructurizeCFG/bug36015.ll | 53 ++++++++++++++ .../Transforms/StructurizeCFG/nested-loop-order.ll | 83 +++++++--------------- 3 files changed, 81 insertions(+), 56 deletions(-) create mode 100644 test/Transforms/StructurizeCFG/bug36015.ll (limited to 'test/Transforms') diff --git a/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll b/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll index 9cddffdd179..5b5ea676bae 100644 --- a/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll +++ b/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll @@ -1,3 +1,4 @@ +; XFAIL: * ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -structurizecfg %s | FileCheck %s diff --git a/test/Transforms/StructurizeCFG/bug36015.ll b/test/Transforms/StructurizeCFG/bug36015.ll new file mode 100644 index 00000000000..24b9c9cdde2 --- /dev/null +++ b/test/Transforms/StructurizeCFG/bug36015.ll @@ -0,0 +1,53 @@ +; RUN: opt -S -structurizecfg %s | FileCheck %s + +; r321751 introduced a bug where control flow branching from if to exit was +; not handled properly and instead ended up in an infinite loop. +define void @bug36015(i32 %cmp0, i32 %count) { +entry: + br label %loop.outer + +loop.outer: + %ctr.loop.outer = phi i32 [ 0, %entry ], [ %ctr.else, %else ] + call void @foo(i32 0) + br label %loop.inner + +loop.inner: + %ctr.loop.inner = phi i32 [ %ctr.loop.outer, %loop.outer ], [ %ctr.if, %if ] + call void @foo(i32 1) + %cond.inner = icmp eq i32 %cmp0, %ctr.loop.inner + br i1 %cond.inner, label %if, label %else + +; CHECK: if: +; CHECK: %0 = xor i1 %cond.if, true +; CHECK: br label %Flow +if: + %ctr.if = add i32 %ctr.loop.inner, 1 + call void @foo(i32 2) + %cond.if = icmp slt i32 %ctr.if, %count + br i1 %cond.if, label %loop.inner, label %exit + +; CHECK: Flow: +; CHECK: %2 = phi i1 [ %0, %if ], [ true, %loop.inner ] +; CHECK: %3 = phi i1 [ false, %if ], [ true, %loop.inner ] +; CHECK: br i1 %2, label %Flow1, label %loop.inner + +; CHECK: Flow1: +; CHECK: br i1 %3, label %else, label %Flow2 + +; CHECK: else: +; CHECK: br label %Flow2 +else: + %ctr.else = add i32 %ctr.loop.inner, 1 + call void @foo(i32 3) + %cond.else = icmp slt i32 %ctr.else, %count + br i1 %cond.else, label %loop.outer, label %exit + +; CHECK: Flow2: +; CHECK: %6 = phi i1 [ %4, %else ], [ true, %Flow1 ] +; CHECK: br i1 %6, label %exit, label %loop.outer + +exit: + ret void +} + +declare void @foo(i32) diff --git a/test/Transforms/StructurizeCFG/nested-loop-order.ll b/test/Transforms/StructurizeCFG/nested-loop-order.ll index 7b5bd5acb62..58634d0d37d 100644 --- a/test/Transforms/StructurizeCFG/nested-loop-order.ll +++ b/test/Transforms/StructurizeCFG/nested-loop-order.ll @@ -1,76 +1,32 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -S -structurizecfg %s -o - | FileCheck %s define void @main(float addrspace(1)* %out) { -; CHECK-LABEL: @main( -; CHECK-NEXT: main_body: -; CHECK-NEXT: br label [[LOOP_OUTER:%.*]] -; CHECK: LOOP.outer: -; CHECK-NEXT: [[TEMP8_0_PH:%.*]] = phi float [ 0.000000e+00, [[MAIN_BODY:%.*]] ], [ [[TMP13:%.*]], [[FLOW3:%.*]] ] -; CHECK-NEXT: [[TEMP4_0_PH:%.*]] = phi i32 [ 0, [[MAIN_BODY]] ], [ [[TMP12:%.*]], [[FLOW3]] ] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: LOOP: -; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[LOOP_OUTER]] ], [ [[TMP12]], [[FLOW:%.*]] ] -; CHECK-NEXT: [[TMP1:%.*]] = phi float [ undef, [[LOOP_OUTER]] ], [ [[TMP13]], [[FLOW]] ] -; CHECK-NEXT: [[TEMP4_0:%.*]] = phi i32 [ [[TEMP4_0_PH]], [[LOOP_OUTER]] ], [ [[TMP15:%.*]], [[FLOW]] ] -; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TEMP4_0]], 1 -; CHECK-NEXT: [[TMP22:%.*]] = icmp sgt i32 [[TMP20]], 3 -; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[TMP22]], true -; CHECK-NEXT: br i1 [[TMP2]], label [[ENDIF:%.*]], label [[FLOW]] -; CHECK: Flow2: -; CHECK-NEXT: [[TMP3:%.*]] = phi float [ [[TEMP8_0_PH]], [[IF29:%.*]] ], [ [[TMP9:%.*]], [[FLOW1:%.*]] ] -; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP20]], [[IF29]] ], [ undef, [[FLOW1]] ] -; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ [[TMP32:%.*]], [[IF29]] ], [ true, [[FLOW1]] ] -; CHECK-NEXT: br label [[FLOW]] -; CHECK: Flow3: -; CHECK-NEXT: br i1 [[TMP16:%.*]], label [[ENDLOOP:%.*]], label [[LOOP_OUTER]] -; CHECK: ENDLOOP: -; CHECK-NEXT: [[TEMP8_1:%.*]] = phi float [ [[TMP14:%.*]], [[FLOW3]] ] -; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[TMP20]], 3 -; CHECK-NEXT: [[DOT45:%.*]] = select i1 [[TMP23]], float 0.000000e+00, float 1.000000e+00 -; CHECK-NEXT: store float [[DOT45]], float addrspace(1)* [[OUT:%.*]] -; CHECK-NEXT: ret void -; CHECK: ENDIF: -; CHECK-NEXT: [[TMP31:%.*]] = icmp sgt i32 [[TMP20]], 1 -; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP31]], true -; CHECK-NEXT: br i1 [[TMP6]], label [[ENDIF28:%.*]], label [[FLOW1]] -; CHECK: Flow1: -; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP20]], [[ENDIF28]] ], [ [[TMP0]], [[ENDIF]] ] -; CHECK-NEXT: [[TMP8:%.*]] = phi float [ [[TMP35:%.*]], [[ENDIF28]] ], [ [[TMP1]], [[ENDIF]] ] -; CHECK-NEXT: [[TMP9]] = phi float [ [[TMP35]], [[ENDIF28]] ], [ [[TEMP8_0_PH]], [[ENDIF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = phi i1 [ [[TMP36:%.*]], [[ENDIF28]] ], [ true, [[ENDIF]] ] -; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[ENDIF28]] ], [ true, [[ENDIF]] ] -; CHECK-NEXT: br i1 [[TMP11]], label [[IF29]], label [[FLOW2:%.*]] -; CHECK: IF29: -; CHECK-NEXT: [[TMP32]] = icmp sgt i32 [[TMP20]], 2 -; CHECK-NEXT: br label [[FLOW2]] -; CHECK: Flow: -; CHECK-NEXT: [[TMP12]] = phi i32 [ [[TMP7]], [[FLOW2]] ], [ [[TMP0]], [[LOOP]] ] -; CHECK-NEXT: [[TMP13]] = phi float [ [[TMP8]], [[FLOW2]] ], [ [[TMP1]], [[LOOP]] ] -; CHECK-NEXT: [[TMP14]] = phi float [ [[TMP3]], [[FLOW2]] ], [ [[TEMP8_0_PH]], [[LOOP]] ] -; CHECK-NEXT: [[TMP15]] = phi i32 [ [[TMP4]], [[FLOW2]] ], [ undef, [[LOOP]] ] -; CHECK-NEXT: [[TMP16]] = phi i1 [ [[TMP10]], [[FLOW2]] ], [ true, [[LOOP]] ] -; CHECK-NEXT: [[TMP17:%.*]] = phi i1 [ [[TMP5]], [[FLOW2]] ], [ true, [[LOOP]] ] -; CHECK-NEXT: br i1 [[TMP17]], label [[FLOW3]], label [[LOOP]] -; CHECK: ENDIF28: -; CHECK-NEXT: [[TMP35]] = fadd float [[TEMP8_0_PH]], 1.000000e+00 -; CHECK-NEXT: [[TMP36]] = icmp sgt i32 [[TMP20]], 2 -; CHECK-NEXT: br label [[FLOW1]] -; + +; CHECK: main_body: +; CHECK: br label %LOOP.outer main_body: br label %LOOP.outer +; CHECK: LOOP.outer: +; CHECK: br label %LOOP LOOP.outer: ; preds = %ENDIF28, %main_body %temp8.0.ph = phi float [ 0.000000e+00, %main_body ], [ %tmp35, %ENDIF28 ] %temp4.0.ph = phi i32 [ 0, %main_body ], [ %tmp20, %ENDIF28 ] br label %LOOP +; CHECK: LOOP: +; br i1 %{{[0-9]+}}, label %ENDIF, label %Flow LOOP: ; preds = %IF29, %LOOP.outer %temp4.0 = phi i32 [ %temp4.0.ph, %LOOP.outer ], [ %tmp20, %IF29 ] %tmp20 = add i32 %temp4.0, 1 %tmp22 = icmp sgt i32 %tmp20, 3 br i1 %tmp22, label %ENDLOOP, label %ENDIF +; CHECK: Flow3 +; CHECK: br i1 %{{[0-9]+}}, label %ENDLOOP, label %LOOP.outer + +; CHECK: ENDLOOP: +; CHECK: ret void ENDLOOP: ; preds = %ENDIF28, %IF29, %LOOP %temp8.1 = phi float [ %temp8.0.ph, %LOOP ], [ %temp8.0.ph, %IF29 ], [ %tmp35, %ENDIF28 ] %tmp23 = icmp eq i32 %tmp20, 3 @@ -78,14 +34,29 @@ ENDLOOP: ; preds = %ENDIF28, %IF29, %LO store float %.45, float addrspace(1)* %out ret void +; CHECK: ENDIF: +; CHECK: br i1 %tmp31, label %IF29, label %Flow1 ENDIF: ; preds = %LOOP %tmp31 = icmp sgt i32 %tmp20, 1 br i1 %tmp31, label %IF29, label %ENDIF28 +; CHECK: Flow: +; CHECK: br i1 %{{[0-9]+}}, label %Flow2, label %LOOP + +; CHECK: IF29: +; CHECK: br label %Flow1 IF29: ; preds = %ENDIF %tmp32 = icmp sgt i32 %tmp20, 2 br i1 %tmp32, label %ENDLOOP, label %LOOP +; CHECK: Flow1: +; CHECK: br label %Flow + +; CHECK: Flow2: +; CHECK: br i1 %{{[0-9]+}}, label %ENDIF28, label %Flow3 + +; CHECK: ENDIF28: +; CHECK: br label %Flow3 ENDIF28: ; preds = %ENDIF %tmp35 = fadd float %temp8.0.ph, 1.0 %tmp36 = icmp sgt i32 %tmp20, 2 -- cgit v1.2.3