From 416cdcce390af48f1c741ff91b26ade0beac3abd Mon Sep 17 00:00:00 2001
From: Guozhi Wei <carrot@google.com>
Date: Mon, 6 Nov 2017 19:09:38 +0000
Subject: [PPC] Use xxbrd to speed up bswap64

Power doesn't have bswap instructions, so llvm generates following code sequence for bswap64.

  rotldi   5, 3, 16
  rotldi   4, 3, 8
  rotldi   9, 3, 24
  rotldi   10, 3, 32
  rotldi   11, 3, 48
  rotldi   12, 3, 56
  rldimi 4, 5, 8, 48
  rldimi 4, 9, 16, 40
  rldimi 4, 10, 24, 32
  rldimi 4, 11, 40, 16
  rldimi 4, 12, 48, 8
  rldimi 4, 3, 56, 0

But Power9 has vector bswap instructions, they can also be used to speed up scalar bswap intrinsic. With this patch, bswap64 can be translated to:

  mtvsrdd 34, 3, 3
  xxbrd 34, 34
  mfvsrld 3, 34

Differential Revision: https://reviews.llvm.org/D39510



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317499 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/PowerPC/bswap64.ll | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 test/CodeGen/PowerPC/bswap64.ll

(limited to 'test/CodeGen')

diff --git a/test/CodeGen/PowerPC/bswap64.ll b/test/CodeGen/PowerPC/bswap64.ll
new file mode 100644
index 00000000000..0a78aa2dc54
--- /dev/null
+++ b/test/CodeGen/PowerPC/bswap64.ll
@@ -0,0 +1,13 @@
+; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64le-- -mcpu=pwr9 | FileCheck %s
+
+declare i64 @llvm.bswap.i64(i64)
+
+; CHECK: mtvsrdd
+; CHECK: xxbrd
+; CHECK: mfvsrd
+define i64 @bswap64(i64 %x) {
+entry:
+  %0 = call i64 @llvm.bswap.i64(i64 %x)
+  ret i64 %0
+}
+
-- 
cgit v1.2.3