From 3b391fe80e65f144d9e2e31a09e24f00ac7bb230 Mon Sep 17 00:00:00 2001 From: Geoff Berry Date: Tue, 12 Dec 2017 17:53:59 +0000 Subject: [MachineOperand][MIR] Add isRenamable to MachineOperand. Summary: Add isRenamable() predicate to MachineOperand. This predicate can be used by machine passes after register allocation to determine whether it is safe to rename a given register operand. Register operands that aren't marked as renamable may be required to be assigned their current register to satisfy constraints that are not captured by the machine IR (e.g. ABI or ISA constraints). Reviewers: qcolombet, MatzeB, hfinkel Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39400 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320503 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/byval-agg-info.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'test/CodeGen/PowerPC') diff --git a/test/CodeGen/PowerPC/byval-agg-info.ll b/test/CodeGen/PowerPC/byval-agg-info.ll index 141edb57967..6e0b167757f 100644 --- a/test/CodeGen/PowerPC/byval-agg-info.ll +++ b/test/CodeGen/PowerPC/byval-agg-info.ll @@ -13,5 +13,5 @@ entry: ; Make sure that the MMO on the store has no offset from the byval ; variable itself (we used to have mem:ST8[%v+64]). -; CHECK: STD killed %x5, 176, %x1; mem:ST8[%v](align=16) +; CHECK: STD killed renamable %x5, 176, %x1; mem:ST8[%v](align=16) -- cgit v1.2.3