From 758e067345e203fed4bd61819c7c8d4f2ad9930b Mon Sep 17 00:00:00 2001 From: Tony Jiang Date: Mon, 16 Jan 2017 20:12:26 +0000 Subject: [PowerPC] Expand ISEL instruction into if-then-else sequence. Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292154 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/crbits.ll | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'test/CodeGen/PowerPC/crbits.ll') diff --git a/test/CodeGen/PowerPC/crbits.ll b/test/CodeGen/PowerPC/crbits.ll index 97f02ef31b3..b894a361d26 100644 --- a/test/CodeGen/PowerPC/crbits.ll +++ b/test/CodeGen/PowerPC/crbits.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -19,6 +20,12 @@ entry: ; CHECK: crnor ; CHECK: crnand [[REG4:[0-9]+]], ; CHECK: isel 3, 0, [[REG1]], [[REG4]] +; CHECK-NO-ISEL-LABEL: @test1 +; CHECK-NO-ISEL: bc 12, 20, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL-NEXT: blr +; CHECK-NO-ISEL-NEXT: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 3, 0, 0 +; CHECK-NO-ISEL-NEXT: blr ; CHECK: blr } -- cgit v1.2.3