From a05cf7b27d896a8deba5a08559e95cdff3668c79 Mon Sep 17 00:00:00 2001 From: Konstantin Zhuravlyov Date: Wed, 18 Oct 2017 17:59:20 +0000 Subject: AMDGPU/Docs: Make target naming consistent - R600 Arch: Use Radeon HD XXXX Series - GCN Arch: Use GFXX Differential Revision: https://reviews.llvm.org/D39019 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316100 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/AMDGPUUsage.rst | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) (limited to 'docs') diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst index 7a4e8e3a6f4..268abc2ff86 100644 --- a/docs/AMDGPUUsage.rst +++ b/docs/AMDGPUUsage.rst @@ -84,38 +84,38 @@ names from both the *Processor* and *Alternative Processor* can be used. Processor Triple APU Support Products Architecture ========== =========== ============ ===== ======= ================== - **R600** [AMD-R6xx]_ + **Radeon HD 2000/3000 Series (R600)** [AMD-RADEON-HD-2000-3000]_ -------------------------------------------------------------------- r600 r600 dGPU r630 r600 dGPU rs880 r600 dGPU rv670 r600 dGPU - **R700** [AMD-R7xx]_ + **Radeon HD 4000 Series (R700)** [AMD-RADEON-HD-4000]_ -------------------------------------------------------------------- rv710 r600 dGPU rv730 r600 dGPU rv770 r600 dGPU - **Evergreen** [AMD-Evergreen]_ + **Radeon HD 5000 Series (Evergreen)** [AMD-RADEON-HD-5000]_ -------------------------------------------------------------------- cedar r600 dGPU redwood r600 dGPU sumo r600 dGPU juniper r600 dGPU cypress r600 dGPU - **Northern Islands** [AMD-Cayman-Trinity]_ + **Radeon HD 6000 Series (Northern Islands)** [AMD-RADEON-HD-6000]_ -------------------------------------------------------------------- barts r600 dGPU turks r600 dGPU caicos r600 dGPU cayman r600 dGPU - **GCN GFX6 (Southern Islands (SI))** [AMD-Souther-Islands]_ + **GCN GFX6 (Southern Islands (SI))** [AMD-GCN-GFX6]_ -------------------------------------------------------------------- gfx600 - tahiti amdgcn dGPU gfx601 - pitcairn amdgcn dGPU - verde - oland - hainan - **GCN GFX7 (Sea Islands (CI))** [AMD-Sea-Islands]_ + **GCN GFX7 (Sea Islands (CI))** [AMD-GCN-GFX7]_ -------------------------------------------------------------------- gfx700 - bonaire amdgcn dGPU - Radeon HD 7790 - Radeon HD 8770 @@ -148,7 +148,7 @@ names from both the *Processor* and *Alternative Processor* can be used. - A4-5100 - A6-5200 - A4 Pro-3340B - **GCN GFX8 (Volcanic Islands (VI))** [AMD-Volcanic-Islands]_ + **GCN GFX8 (Volcanic Islands (VI))** [AMD-GCN-GFX8]_ -------------------------------------------------------------------- gfx800 - iceland amdgcn dGPU - FirePro S7150 - FirePro S7100 @@ -189,7 +189,7 @@ names from both the *Processor* and *Alternative Processor* can be used. \ - polaris11 amdgcn dGPU ROCm - Radeon RX 460 gfx804 amdgcn dGPU Same as gfx803 gfx810 - stoney amdgcn APU - **GCN GFX9** [AMD-Vega]_ + **GCN GFX9** [AMD-GCN-GFX9]_ -------------------------------------------------------------------- gfx900 amdgcn dGPU - Radeon Vega Frontier Edition @@ -3530,8 +3530,7 @@ It supports AMDGCN GFX6-GFX8. This section describes general syntax for instructions and operands. For more information about instructions, their semantics and supported combinations of operands, refer to one of instruction set architecture manuals -[AMD-Souther-Islands]_, [AMD-Sea-Islands]_, [AMD-Volcanic-Islands]_ and -[AMD-Vega]_. +[AMD-GCN-GFX6]_, [AMD-GCN-GFX7]_, [AMD-GCN-GFX8]_ and [AMD-GCN-GFX9]_. An instruction has the following syntax (register operands are normally comma-separated while extra operands are space-separated): @@ -3847,14 +3846,14 @@ Here is an example of a minimal amd_kernel_code_t specification: Additional Documentation ======================== -.. [AMD-R6xx] `AMD R6xx shader ISA `__ -.. [AMD-R7xx] `AMD R7xx shader ISA `__ -.. [AMD-Evergreen] `AMD Evergreen shader ISA `__ -.. [AMD-Cayman-Trinity] `AMD Cayman/Trinity shader ISA `__ -.. [AMD-Souther-Islands] `AMD Southern Islands Series ISA `__ -.. [AMD-Sea-Islands] `AMD Sea Islands Series ISA `_ -.. [AMD-Volcanic-Islands] `AMD GCN3 Instruction Set Architecture `__ -.. [AMD-Vega] `AMD "Vega" Instruction Set Architecture `__ +.. [AMD-RADEON-HD-2000-3000] `AMD R6xx shader ISA `__ +.. [AMD-RADEON-HD-4000] `AMD R7xx shader ISA `__ +.. [AMD-RADEON-HD-5000] `AMD Evergreen shader ISA `__ +.. [AMD-RADEON-HD-6000] `AMD Cayman/Trinity shader ISA `__ +.. [AMD-GCN-GFX6] `AMD Southern Islands Series ISA `__ +.. [AMD-GCN-GFX7] `AMD Sea Islands Series ISA `_ +.. [AMD-GCN-GFX8] `AMD GCN3 Instruction Set Architecture `__ +.. [AMD-GCN-GFX9] `AMD "Vega" Instruction Set Architecture `__ .. [AMD-OpenCL_Programming-Guide] `AMD Accelerated Parallel Processing OpenCL Programming Guide `_ .. [AMD-APP-SDK] `AMD Accelerated Parallel Processing APP SDK Documentation `__ .. [AMD-ROCm] `ROCm: Open Platform for Development, Discovery and Education Around GPU Computing `__ -- cgit v1.2.3