From e64cc9309f5236bc0460b05843711d231707d188 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 21 Feb 2018 19:27:01 +0000 Subject: [ReleaseNotes] Initial release notes for X86 target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@325709 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/ReleaseNotes.rst | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index f5da7656b03..a0df1890987 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -135,11 +135,23 @@ During this release the SystemZ target has: Changes to the X86 Target ------------------------- -During this release ... +During this release the X86 target has: -* Got support for enabling SjLj exception handling on platforms where it +* Added support for enabling SjLj exception handling on platforms where it isn't the default. +* Added intrinsics for Intel Extensions: VAES, GFNI, VPCLMULQDQ, AVX512VBMI2, AVX512BITALG, AVX512VNNI. + +* Added support for Intel Icelake CPU. + +* Added instruction scheduling information for Intel Sandy Bridge, Ivy Bridge, Haswell, Broadwell, and Skylake CPUs. + +* Improved codegen of data being transferred between GPRs and K-registers. + +* Improved llvm-mc's disassembler for some EVEX encoded instructions. + +* Improved codegen for vector truncations. + Changes to the AMDGPU Target ----------------------------- -- cgit v1.2.3