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AgeCommit message (Expand)Author
2017-11-10[debuginfo-tests] Make debuginfo-tests work in a standard configuration.Zachary Turner
2017-11-10Allow separation of declarations and definitions in <Target>ISelDAGToDAG.incKrzysztof Parzyszek
2017-11-09[utils] Fix RISC-V support in update_llc_test_checks.pyAlex Bradbury
2017-11-08[utils] Add RISC-V support to update_llc_test_checks.pyAlex Bradbury
2017-11-07Add a -D flag to FileCheck to define variablesAlexander Richardson
2017-11-07[AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to distinguish Scalab...Florian Hahn
2017-11-06update_mir_test_checks: Be careful about replacing entire vregsJustin Bogner
2017-11-04Move the llvm-tblgen project into the Tablegenning folder on IDEs like Visual...Aaron Ballman
2017-11-04[X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 int...Craig Topper
2017-11-03[globalisel][tablegen] Skip src child predicatesDiana Picus
2017-11-03[TableGen] Add an extra blank line to DAGISel output file to separate functions.Craig Topper
2017-11-01[globalisel][regbank] Warn about MIR ambiguities when register bank/class nam...Daniel Sanders
2017-11-01[X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q...Craig Topper
2017-11-01[globalisel][tablegen] Add support for multi-insn emissionDaniel Sanders
2017-11-01Fix warnings discovered by rL317076. [-Wunused-private-field]NAKAMURA Takumi
2017-11-01[globalisel][tablegen] Stop hard-coding the emitted instruction ID to 0. NFCDaniel Sanders
2017-11-01Add system-linux to allow tests run with llvm-lit to restrict themselves to l...Jake Ehrlich
2017-10-31Re-commit: [globalisel][tablegen] Keep track of the insertion point while add...Daniel Sanders
2017-10-31Revert r317040: [globalisel][tablegen] Keep track of the insertion point whil...Daniel Sanders
2017-10-31Re-commit: [globalisel][tablegen] Keep track of the insertion point while add...Daniel Sanders
2017-10-31Revert r317029: [globalisel][tablegen] Keep track of the insertion point whil...Daniel Sanders
2017-10-31[globalisel][tablegen] Keep track of the insertion point while adding BuildMI...Daniel Sanders
2017-10-31[globalisel][tablegen] Factor out implicit def/use renderers from createAndIm...Daniel Sanders
2017-10-31[globalisel][tablegen] Add infrastructure to potentially allow BuildMIAction ...Daniel Sanders
2017-10-31[globalisel][tablegen] Allow any comment in DebugCommentAction. NFCDaniel Sanders
2017-10-31Adding a shufflevector and select LLVM IR instructions fuzz toolAyman Musa
2017-10-27Force #define GTEST_LANG_CXX11.Zachary Turner
2017-10-26[TableGen] Use Twine instead of std::string concatenation in two calls to Pri...Craig Topper
2017-10-26[AsmParser][TableGen] Add VariantID argument to the generated mnemonic spell ...Craig Topper
2017-10-26[AsmParser][TableGen] Make the generated mnemonic spell checker function a fi...Craig Topper
2017-10-24[globalisel][tablegen] Fix future undefined behaviour in r316463.Daniel Sanders
2017-10-24[globalisel][tablegen] Multi-insn emission requires that BuildMIAction suppor...Daniel Sanders
2017-10-24[TableGen] Fix some formatting quirks in the subtarget output file.Craig Topper
2017-10-24[TableGen] Simplify some of the subtarget emission by removing code that avoi...Craig Topper
2017-10-24[utils] make retq/retl regex an option that is off by defaultSanjay Patel
2017-10-24[globalisel][tablegen] Remove unused InstructionMatcher's. NFCDaniel Sanders
2017-10-23[globalisel][tablegen] Import stores and allow GISel to automatically substit...Daniel Sanders
2017-10-23[X86] Fix disassembler table generation to prevent instructions tagged with '...Craig Topper
2017-10-23[X86] Update a doxygen comment in the disassembler tablegen code. NFCCraig Topper
2017-10-23[X86] Fix disassembly of EVEX rounding control and SAE instructions.Craig Topper
2017-10-22[utils] Support -mtriple=powerpc64Fangrui Song
2017-10-22[X86] More correctly support LIG and WIG for EVEX instructions in the disasse...Craig Topper
2017-10-22[X86] Teach the disassembler that some instructions use VEX.W==0 without a co...Craig Topper
2017-10-21[X86] Fix disassembling of EVEX instructions to stop accidentally decoding th...Craig Topper
2017-10-20[utils, x86] add regex for retl/retq to reduce duplicated FileChecking (PR35003)Sanjay Patel
2017-10-20[globalisel][tablegen] Fix small spelling nits. NFCDaniel Sanders
2017-10-18update_mir_test_checks: Support adding checks for vreg classesJustin Bogner
2017-10-18update_mir_test_checks: Improve message when updating failsJustin Bogner
2017-10-18update_mir_test_checks: Handle empty liveinsJustin Bogner
2017-10-18update_mir_test_checks: Do a better job of disambiguating namesJustin Bogner
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