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AgeCommit message (Expand)Author
2018-01-17Merging r322272:Hans Wennborg
2018-01-17Merging r321791 and r321862:Hans Wennborg
2018-01-17Merging r321991:Hans Wennborg
2018-01-17Merging r322623:Hans Wennborg
2018-01-03[GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflowAmara Emerson
2018-01-02Handle the case of live 16-bit subregisters in X86FixupBWInstsAndrew Kaylor
2018-01-02[AArch64] fix typos in comments; NFCSanjay Patel
2018-01-02[ValueTracking] recognize min/max of min/max patternsSanjay Patel
2018-01-02[AArch64] add tests for min/max of min/max (PR35717); NFCSanjay Patel
2018-01-02[AArch64][GlobalISel] Fix assert fail with unknown intrinsic.Amara Emerson
2018-01-02[x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR...Sanjay Patel
2018-01-02[AArch64][GlobalISel] Enable GlobalISel at -O0 by defaultAmara Emerson
2018-01-02[Hexagon] Fix generation of vector sign extensionsKrzysztof Parzyszek
2018-01-02Revert r321089: "[DAG] Elide overlapping store" (and subsequent fix in r321204)Daniel Jasper
2018-01-02[DAGCombine] Fix for PR35765Sam Parker
2018-01-02[X86] Codegen test for pr35765Sam Parker
2018-01-02[SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened r...Craig Topper
2018-01-01[X86] Promote vXi1 fp_to_uint/fp_to_sint to vXi32 to avoid scalarization.Craig Topper
2018-01-01[X86] Add test cases for vXi1 fptosi/fptoui.Craig Topper
2018-01-01[x86] add runs for more vector variants; NFCSanjay Patel
2018-01-01[X86][SSE] Add test case from PR32160Simon Pilgrim
2018-01-01[X86] Regenerate test checks in sse-intrinsics-x86-upgrade with update-llcUriel Korach
2018-01-01[X86] Regenerate test checks in sse2-intrinsics-x86-upgrade with update-llcUriel Korach
2018-01-01[X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all si...Craig Topper
2018-01-01[X86] Add patterns for using zmm registers for v8i32/v8f32 vselect with the f...Craig Topper
2017-12-31[X86] Use CONCAT_VECTORS instead of INSERT_SUBVECTOR for padding v4i1/v2i1 ve...Craig Topper
2017-12-31[X86][AVX2] Combine extract(broadcast(scalar_value)) --> scalar_valueSimon Pilgrim
2017-12-31[X86][AVX] Add test case from PR33740Simon Pilgrim
2017-12-31[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)Simon Pilgrim
2017-12-31[X86] Add a DAG combine to widen (i4 (bitcast (v4i1))) before type legalizati...Craig Topper
2017-12-31[X86] Add a DAG combine to fix (v4i1 (bitcast (i4))) before type legalization...Craig Topper
2017-12-31[X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don'...Craig Topper
2017-12-31[X86] Remove AND32ri8 from pattern for v1i1 load.Craig Topper
2017-12-31[X86] Fix a crash when returning a <1 x i1> value>Craig Topper
2017-12-312nd attempt at "fixing" amdgpu tests after r321575​Philip Reames
2017-12-30Test fix after r321575Philip Reames
2017-12-30[X86][SSE] Add PR30780 test casesSimon Pilgrim
2017-12-30[X86][SSE] Add test for (v2f32 uitofp(build_vector(i32, i32))) (PR35732)Simon Pilgrim
2017-12-30[PowerPC] fix a bug in TCO eligibility checkHiroshi Inoue
2017-12-30[X86] Custom legalize vXi1 extract_subvector with KSHIFTR.Craig Topper
2017-12-29[mips] Replace assert by an error messageSimon Atanasyan
2017-12-29AMDGPU: Remove mayLoad/hasSideEffects from MIMG storesMatt Arsenault
2017-12-29[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)Simon Pilgrim
2017-12-29[PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversionNemanja Ivanovic
2017-12-28[x86] add tests for potential memcmp expansion (PR33325); NFCSanjay Patel
2017-12-28Unbreak test relying on debug output after r321540.Benjamin Kramer
2017-12-28[X86] When lowering extending loads from v2i1/v4i1, if we have VLX, use a nar...Craig Topper
2017-12-28[WinEH] Don't emit state stores or EH thunks for available_externally functionsReid Kleckner
2017-12-28Fix tests after move to utohexstr.Benjamin Kramer
2017-12-28[X86][SSE] Use PMADDWD for v4i32 multiplies with 17 or more leading zerosSimon Pilgrim
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