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AgeCommit message (Expand)Author
2017-11-28[WebAssembly] Support bitcasted function addresses with varargs.Dan Gohman
2017-11-28DAG: Legalize truncstores to illegal int typesMatt Arsenault
2017-11-28[X86][X87] Tag FTST x87 instruction scheduler classSimon Pilgrim
2017-11-28[X86][X87] Tag FABS/FCHS/FSQRT/FSIN/FCOS x87 instruction scheduler classesSimon Pilgrim
2017-11-28[X86][X86] Add some x87 schedule testsSimon Pilgrim
2017-11-28[X86][3DNow] Add instruction itinerary and scheduling classes for femms/prefe...Simon Pilgrim
2017-11-28[COFF] Implement constructor prioritiesMartin Storsjo
2017-11-28[WebAssembly] Handle errors better in fast-isel.Dan Gohman
2017-11-28[DAGCombine] Disable finding better chains for stores at O0Simon Dardis
2017-11-28[X86] Make zero extend from v16i1/v8i1 to v16i8/v8i16/v16i16 not scalarize un...Craig Topper
2017-11-28[X86] Add command line without AVX512BW/AVX512VL to bitcast-int-to-vector-boo...Craig Topper
2017-11-28ARM: Fix PR32578Matthias Braun
2017-11-28[WebAssembly] Fix trapping behavior in fptosi/fptoui.Dan Gohman
2017-11-27[DAGCombiner] Don't combine aext(setcc) if the setcc is already using the tar...Craig Topper
2017-11-27[X86] Teach getSetCCResultType to handle more than just SimpleVTs when lookin...Craig Topper
2017-11-27[PartiallyInlineLibCalls][x86] add TTI hook to allow sqrt inlining to depend ...Sanjay Patel
2017-11-27[AMDGPU] Update test nullptr.ll to use amdgiz environmentYaxun Liu
2017-11-27[PowerPC] Remove redundant TOC savesZaara Syeda
2017-11-27[X86] Add avx512bw command lines to vselect-packss.llCraig Topper
2017-11-27[X86] Make getSetCCResultType return vXi1 for any vXi32/vXi64 vector over 512...Craig Topper
2017-11-27[Power9] Improvements to vector extract with variable index exploitationZaara Syeda
2017-11-27[DAG] Do MergeConsecutiveStores again before Instruction SelectionNirav Dave
2017-11-27[X86] Add INVLPGA to the existing INVLPG schedulingSimon Pilgrim
2017-11-27[mips] fix asmstring of Ext and Ins instructions and mips16 JALRC/JRCPetar Jovanovic
2017-11-27[X86] Add scheduling tests for invlpg/invlpgaSimon Pilgrim
2017-11-27[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsicsVedran Miletic
2017-11-27[ARM] Fix an off-by-one error when restoring LR for 16-bit ThumbMomchil Velikov
2017-11-27Update BTVER2 sched numbers for SSE42 string instructions.Andrew V. Tischenko
2017-11-27[SelectionDAG] Teach SplitVecRes_SETCC to call GetSplitVector if the operands...Craig Topper
2017-11-26[X86][3DNow] Add 3DNow! instruction itinerary and scheduling classesSimon Pilgrim
2017-11-26[X86][SSE] Add SSE42 tests to the clear upper testsSimon Pilgrim
2017-11-26[X86][MMX] Add IIC_MMX_MOVMSK instruction itinerary classSimon Pilgrim
2017-11-26Control-Flow Enforcement Technology - Shadow Stack support (LLVM side)Oren Ben Simhon
2017-11-26[x86][icelake]GFNICoby Tayree
2017-11-25[X86] Add separate intrinsics for scalar FMA4 instructions.Craig Topper
2017-11-25[X86] Don't report gather is legal on Skylake CPUs when AVX2/AVX512 is disabl...Craig Topper
2017-11-25Add BTVER2 sched support for SHLD/SHRD.Andrew V. Tischenko
2017-11-25[X86] Support folding to andnps with SSE1 only.Craig Topper
2017-11-25[X86] Add some early DAG combines to turn v4i32 AND/OR/XOR into FAND/FOR/FXOR...Craig Topper
2017-11-24[X86] Prevent using X * rsqrt(X) to approximate sqrt when only sse1 is enabled.Craig Topper
2017-11-24[AVR] Use the short form of 'clr <reg>'Dylan McKay
2017-11-24[mips] Set microMIPS ASE flagAleksandar Beserminji
2017-11-23[X86] Don't invert NewCC variable while processing the jcc/setcc/cmovcc instr...Craig Topper
2017-11-23[X86] Teach isel that X86ISD::CMPM_RND zeros the upper bits of the mask regis...Craig Topper
2017-11-23[X86][SSE] Use (V)PHMINPOSUW for vXi16 SMAX/SMIN/UMAX/UMIN horizontal reducti...Simon Pilgrim
2017-11-23[ARM GlobalISel] Support G_FDIV for s32 and s64Diana Picus
2017-11-23[ARM GlobalISel] Support G_FMUL for s32 and s64Diana Picus
2017-11-23[mips] Use the delay slot filler to convert branches for microMIPSR6.Simon Dardis
2017-11-23[x86][icelake]BITALGCoby Tayree
2017-11-22[X86] Regenerate the vector-popcnt and vector-tzcnt tests to get BITALG CHECK...Craig Topper
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