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AgeCommit message (Expand)Author
2017-12-05Add REQUIRES asserts in combine_loads_from_build_pair.llBjorn Pettersson
2017-12-05[DAGCombine] Move AND nodes to multiple load leavesSam Parker
2017-12-05[DAGCombine] Handle big endian correctly in CombineConsecutiveLoadsBjorn Pettersson
2017-12-05[X86][AVX512] Add missing scalar CMPSS/CMPSD logic scheduler classesSimon Pilgrim
2017-12-05[X86][AVX512] Cleanup bit logic scheduler classesSimon Pilgrim
2017-12-05[X86][AVX512] Tag scalar CVT and CMP instruction scheduler classesSimon Pilgrim
2017-12-05[X86][AVX512] Tag VPCMP/VPCMPU instruction scheduler classesSimon Pilgrim
2017-12-05[X86][AVX512] Cleanup VPCMP scheduler classesSimon Pilgrim
2017-12-05[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.Jonas Paulsson
2017-12-05[Regalloc] Generate and store multiple regalloc hints.Jonas Paulsson
2017-12-05[X86] Fix a bug in handling GRXX subclasses in Domain Reassignment passGuy Blank
2017-12-05[X86] Use vector widening to support sign extend from i1 when the dest type i...Craig Topper
2017-12-05Revert r319691: [globalisel][tablegen] Split atomic load/store into separate ...Daniel Sanders
2017-12-05[X86] Fix a crash if avx512bw and xop are both enabled when the IR contrains ...Craig Topper
2017-12-05AMDGPU: Fix crash when scheduling DBG_VALUEMatt Arsenault
2017-12-05[X86] Use vector widening to support zero extend from i1 when the dest type i...Craig Topper
2017-12-05[X86] Don't use kunpck for vXi1 concat_vectors if the upper bits are undef.Craig Topper
2017-12-05[X86] Use getZeroVector and remove an unnecessary creation of an APInt before...Craig Topper
2017-12-04AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instructionJan Vesely
2017-12-04AMDGPU: Disable fp64 support on pre GCN asicsJan Vesely
2017-12-04Revert r319490 "XOR the frame pointer with the stack cookie when protecting t...Hans Wennborg
2017-12-04AMDGPU: Fix creating invalid copy when adjusting dmaskMatt Arsenault
2017-12-04Re-submit r289925 (Update .debug_line section version to match DWARF version)Paul Robinson
2017-12-04[globalisel][tablegen] Tests for r319691Daniel Sanders
2017-12-04DAG: Match truncated rotation (PR35487)Hans Wennborg
2017-12-04[globalisel][tablegen] Split atomic load/store into separate opcode and enabl...Daniel Sanders
2017-12-04Add missing triple args to testsMatthias Braun
2017-12-04MachineVerifier: undef phi arg doesn't need to be live-out from predecessorMatthias Braun
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-12-04Fix function pointer tail calls in armv8-M.basePablo Barrio
2017-12-04[AMDGPU] SDWA: add support for PRESERVE into SDWA peephole.Sam Kolton
2017-12-04[ARM] CodeGen testSam Parker
2017-12-04[NVPTX] Assign valid global namesJonas Hahnfeld
2017-12-04[AArch64] Allow using emulated tls on platforms other than ELFMartin Storsjo
2017-12-04[ARM] Allow using emulated tls on platforms other than ELFMartin Storsjo
2017-12-04[X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit vecto...Craig Topper
2017-12-04[SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a no...Craig Topper
2017-12-03[X86][AVX512] Tag packed F2I/I2F/F2F conversion instructions scheduler classSimon Pilgrim
2017-12-03[X86][AVX512] Regenerate schedule tests.Simon Pilgrim
2017-12-03CodeGen: Fix SelectionDAGISel::LowerArguments for sret addr spaceYaxun Liu
2017-12-02CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT...Yaxun Liu
2017-12-02[DAG][AArch64] Disable post-legalization storeNirav Dave
2017-12-01Revert "[X86] Improvement in CodeGen instruction selection for LEAs."Matt Morehouse
2017-12-01[DAG][ARM] Revert "Reenable post-legalize store merge"Nirav Dave
2017-12-01[opt-remarks] If hotness threshold is set, ignore remarks without hotnessAdam Nemet
2017-12-01Revert "[opt-remarks] If hotness threshold is set, ignore remarks without hot...Adam Nemet
2017-12-01[opt-remarks] If hotness threshold is set, ignore remarks without hotnessAdam Nemet
2017-12-01[ARM] and + load combine testsSam Parker
2017-12-01[ARM][DAG] Reenable post-legalize store mergeNirav Dave
2017-12-01[X86] Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja
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