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ampere-computing/llvm.git
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release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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X86
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vector-shuffle-avx512.ll
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2017-12-07
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-04
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-11-08
Revert "Correct dwarf unwind information in function epilogue for X86"
Reid Kleckner
2017-11-07
Reland "Correct dwarf unwind information in function epilogue for X86"
Petar Jovanovic
2017-11-01
Revert "Correct dwarf unwind information in function epilogue for X86"
Petar Jovanovic
2017-11-01
Correct dwarf unwind information in function epilogue for X86
Petar Jovanovic
2017-10-10
[MC] Suppress .Lcfi labels when emitting textual assembly
Reid Kleckner
2017-09-19
[X86] Add VPERMPD/VPERMQ and VPERMPS/VPERMD to the execution domain fixing ta...
Craig Topper
2017-09-03
[X86] Add VBLENDPS/VPBLENDD to the execution domain fixing tables.
Craig Topper
2017-08-17
[AVX512] Don't switch unmasked subvector insert/extract instructions when AVX...
Craig Topper
2017-08-03
[X86] SET0 to use XMM registers where possible PR26018 PR32862
Dinar Temirbulatov
2017-07-31
[AVX-512] Add unmasked subvector inserts and extract to the execution domain ...
Craig Topper
2017-07-27
[X86] SET0 to use XMM registers where possible PR26018 PR32862
Dinar Temirbulatov
2017-07-26
[X86][AVX512] Regenerate shuffle tests with broadcast comments.
Simon Pilgrim
2017-06-29
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
Daniel Jasper
2017-06-28
[X86] Correct dwarf unwind information in function epilogue
Petar Jovanovic
2017-05-27
[DAGCombiner] use narrow load to avoid vector extract
Sanjay Patel
2017-03-28
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
Craig Topper
2017-02-15
[X86] Don't create VBROADCAST nodes with 256-bit or 512-bit input types
Craig Topper
2017-01-15
Fix blend mask by switch the side of the operand since Blend node uses opposi...
Michael Zuckerman
2017-01-14
[AVX-512] Change blend mask in lowerVectorShuffleAsBlend to a 64-bit value. A...
Craig Topper
2017-01-13
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
Michael Zuckerman
2017-01-10
[X86][AVX512]Improving shuffle lowering by using AVX-512 EXPAND* instructions
Michael Zuckerman
