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path: root/test/CodeGen/X86/vector-lzcnt-256.ll
AgeCommit message (Expand)Author
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih
2017-09-05[X86][AVX512] Use AVX512 attributes instead of -mcpuSimon Pilgrim
2017-08-03[X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov
2017-07-31[AVX-512] Remove patterns that select vmovdqu8/16 for unmasked loads. Prefer ...Craig Topper
2017-07-27[X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov
2017-05-14[X86] Add avx512vl command lines to the 128/256-bit vector-lzcnt tests so we ...Craig Topper
2017-05-14[X86] Cleanup some of the check-prefixes in the vector-lzcnt tests.Craig Topper
2017-02-11[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is...Craig Topper
2017-02-10[DAGCombine] Allow vector constant folding of any value type before type lega...Simon Pilgrim
2017-01-03[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT in...Craig Topper
2016-12-28This is a large patch for X86 AVX-512 of an optimization for reducing code si...Gadi Haber
2016-12-12[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.Simon Pilgrim
2016-10-21[X86][AVX] Add 32-bit target tests for vector lzcnt/tzcnt to demonstrate miss...Simon Pilgrim
2016-08-04[X86][SSE] Don't decide when to scalarize CTTZ/CTLZ for performance at loweri...Simon Pilgrim
2016-08-01[AVX-512] Fix duplicate column in AVX512 execution dependency table that was ...Craig Topper
2016-07-22[AVX512] Add ExeDomain to vector extend and truncate instructions.Craig Topper
2016-07-09VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun
2016-05-21[AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AV...Craig Topper
2016-05-16[X86][SSSE3] Lower vector CTLZ with PSHUFB lookupsSimon Pilgrim
2016-03-28[X86][SSE] Vectorize a bit (AND/XOR/OR) op if a BUILD_VECTOR has the same op ...Simon Pilgrim
2016-02-06[X86][AVX512] Added support for VPMOVZX shuffle decoding.Simon Pilgrim
2016-02-06[X86][AVX512] Fixed prefix ordering for lzcnt tests.Simon Pilgrim
2015-11-23Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight
2015-10-18AVX512: Lowering i8/i16 vector CTLZ using the dword LZCNT vector instructionIgor Breger
2015-09-20AVX512: Implement instructions encoding, lowering and intrinsicsIgor Breger
2015-09-05[X86] Updated vector lzcnt tests. Added missing vec512 tests.Simon Pilgrim
2015-09-03AVX512: Implemented encoding and intrinsics for vplzcntq, vplzcntd, vpconflic...Igor Breger
2015-07-19[X86][SSE] Tidied up vector CTLZ/CTTZ. NFCI.Simon Pilgrim
2015-06-08[X86][SSE] Added lzcnt vector tests.Simon Pilgrim
2015-06-08[DAGCombiner] Added CTLZ vector constant folding support.Simon Pilgrim
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