| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-07 | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih |
| 2017-12-04 | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih |
| 2017-11-28 | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih |
| 2017-09-19 | [X86] Add VPERMPD/VPERMQ and VPERMPS/VPERMD to the execution domain fixing ta... | Craig Topper |
| 2017-07-27 | [X86] SET0 to use XMM registers where possible PR26018 PR32862 | Dinar Temirbulatov |
| 2017-03-04 | [X86][SSE] Enable post-legalize vXi64 shuffle combining on 32-bit targets | Simon Pilgrim |
| 2017-02-20 | [SelectionDAG] Add scalarization support for ISD::*_EXTEND_VECTOR_INREG opcodes. | Simon Pilgrim |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |