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path: root/test/CodeGen/X86/vec_sdiv_to_shift.ll
AgeCommit message (Expand)Author
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-03-14[DAG] vector div/rem with any zero element in divisor is undefSanjay Patel
2017-03-06[DAGCombiner] simplify div/rem-by-0Sanjay Patel
2016-04-01[X86][SSE] Regenerated vector sdiv to shifts testsSimon Pilgrim
2015-08-19[X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizin...Michael Kuperstein
2013-07-13Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....Stephen Lin
2013-06-26Optimized integer vector multiplication operation by replacing it with shift/...Elena Demikhovsky
2013-03-09Test case hygiene.Benjamin Kramer
2013-01-09add -march to the testNadav Rotem
2013-01-09Efficient lowering of vector sdiv when the divisor is a splatted power of two...Nadav Rotem