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path: root/test/CodeGen/X86/vec_ctbits.ll
AgeCommit message (Expand)Author
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-06-26[x86] transform vector inc/dec to use -1 constant (PR33483)Sanjay Patel
2016-11-08[VectorLegalizer] Expansion of CTLZ using CTPOP when possibleSimon Pilgrim
2016-08-04[X86][SSE] Don't decide when to scalarize CTTZ/CTLZ for performance at loweri...Simon Pilgrim
2016-02-11[SelectionDAG] change getConstant() to use the input SDLoc when building spla...Sanjay Patel
2015-11-23Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight
2015-07-26[X86][SSE] Refreshed vector bit count tests.Simon Pilgrim
2014-09-12llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It...NAKAMURA Takumi
2014-09-12Legalizer: Use the scalar bit width when promoting bit counting instrs onBenjamin Kramer
2011-12-12Manually upgrade the test suite to specify the flag to cttz and ctlz.Chandler Carruth
2009-09-08Eliminate more uses of llvm-as and llvm-dis.Dan Gohman
2008-05-29Add nounwind.Evan Cheng
2007-12-12Allow vector integer constants to be created withDan Gohman