| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-07 | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih |
| 2017-12-04 | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih |
| 2017-11-28 | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih |
| 2017-09-22 | [x86] swap order of srl (and X, C1), C2 when it saves size | Sanjay Patel |
| 2017-06-12 | [x86] regenerate checks with update_llc_test_checks.py | Sanjay Patel |
| 2016-07-09 | VirtRegMap: Replace some identity copies with KILL instructions. | Matthias Braun |
| 2016-05-10 | update test to use FileCheck for tighter checking | Sanjay Patel |
| 2009-09-08 | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman |
| 2008-11-30 | Fix for PR2164: allow transforming arbitrary-width unsigned divides into | Eli Friedman |
| 2007-11-26 | Don't lower srem/urem X%C to X-X/C*C unless the division is actually | Dan Gohman |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |