Age | Commit message (Expand) | Author |
---|---|---|
2017-12-04 | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih |
2017-01-10 | AMD family 17h (znver1) enablement | Craig Topper |
2016-02-21 | Fix LLVM's handling and detection of skylake and cannonlake CPUs | Sanjoy Das |
2015-08-25 | make fast unaligned memory accesses implicit with SSE4.2 or SSE4a | Sanjay Patel |
2015-08-23 | remove FIXME; fixed by r245733 | Sanjay Patel |
2015-08-21 | remove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or later | Sanjay Patel |
2015-08-21 | save some testing time; get rid of the non-SSE chips in this test | Sanjay Patel |
2015-08-21 | add a test case to check the fast-unaligned-mem attribute per CPU | Sanjay Patel |