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path: root/test/CodeGen/X86/implicit-null-checks.mir
AgeCommit message (Expand)Author
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-30[CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih
2017-08-09[ImplicitNullCheck] Fix the bug when dependent instruction accesses memorySerguei Katkov
2017-06-19Fix machine instruction in test caseSanjoy Das
2017-05-31ImplicitNullChecks: Clear kill/dead flags when moving instructions aroundMatthias Braun
2017-05-05MIParser/MIRPrinter: Compute block successors if not explicitely specifiedMatthias Braun
2017-02-28[ImplicitNullCheck] Add alias analysis usageSanjoy Das
2017-02-07[ImplicitNullCheck] Extend Implicit Null Check scope by using storesSanjoy Das
2017-02-01[ImplicitNullChecks] NFC Fix the implicit-null-checks.mir testSanjoy Das
2017-02-01[ImplicitNullCheck] Extend canReorder scopeSanjoy Das
2017-01-26[ImplicitNullChecks] Add a test demonstrating a case we don't get todaySanjoy Das
2017-01-10Make the test accept different OpCode values since it doesn't really care abo...Douglas Yung
2016-12-23Reimplement depedency tracking in the ImplicitNullChecks passSanjoy Das
2016-11-17[ImplicitNullCheck] Fix an edge case where we were hoisting incorrectlySanjoy Das
2016-11-16[ImplicitNullChecks] Do not not handle call MachineInstrsSanjoy Das
2016-08-25MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun
2016-08-24MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun
2016-08-24MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun
2016-07-13[MIR] Print on the given output instead of stderr.Quentin Colombet
2016-07-07tests: accept different TargetOpcode values.Tim Northover
2016-06-22[ImplicitNullChecks] Hoist trivial depdendencies if possibleSanjoy Das