ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2018-01-01	[X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all si...	Craig Topper
2017-12-14	[SelectionDAG][X86] Improve legalization of v32i1 CONCAT_VECTORS of v16i1 for...	Craig Topper
2017-12-07	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	Francis Visoiu Mistrih
2017-12-04	[CodeGen] Unify MBB reference format in both MIR and debug output	Francis Visoiu Mistrih
2017-11-28	[CodeGen] Print register names in lowercase in both MIR and debug output	Francis Visoiu Mistrih
2017-11-08	Revert "Correct dwarf unwind information in function epilogue for X86"	Reid Kleckner
2017-11-07	Reland "Correct dwarf unwind information in function epilogue for X86"	Petar Jovanovic
2017-11-01	Revert "Correct dwarf unwind information in function epilogue for X86"	Petar Jovanovic
2017-11-01	Correct dwarf unwind information in function epilogue for X86	Petar Jovanovic
2017-10-24	[X86] truncateVectorCompareWithPACKSS - use PACKSSDW/PACKSSWB instead of just...	Simon Pilgrim
2017-10-23	[X86][SSE] combineBitcastvxi1 - use PACKSSWB directly to pack v8i16 to v16i8	Simon Pilgrim
2017-10-10	[MC] Suppress .Lcfi labels when emitting textual assembly	Reid Kleckner
2017-10-04	[X86][AVX] Improve (i8 bitcast (v8i1 x)) handling for v8i64/v8f64 512-bit vec...	Simon Pilgrim
2017-07-21	[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSK	Simon Pilgrim
2017-07-12	[X86][SSE] Fix file check prefix warning breaking buildbots	Simon Pilgrim
2017-07-12	[X86][SSE] Add 512-bit (iX bitcast(vXi1)) test cases	Simon Pilgrim