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path: root/test/CodeGen/X86/bitcast-setcc-256.ll
AgeCommit message (Expand)Author
2018-01-01[X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all si...Craig Topper
2017-12-31[X86] Add a DAG combine to widen (i4 (bitcast (v4i1))) before type legalizati...Craig Topper
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-08Revert "Correct dwarf unwind information in function epilogue for X86"Reid Kleckner
2017-11-07Reland "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic
2017-11-01Revert "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic
2017-11-01Correct dwarf unwind information in function epilogue for X86Petar Jovanovic
2017-10-31[X86][AVX512] Split AVX512F and AVX512BW bool-vector bitcast testsSimon Pilgrim
2017-10-24[X86] truncateVectorCompareWithPACKSS - use PACKSSDW/PACKSSWB instead of just...Simon Pilgrim
2017-10-23[X86][SSE] combineBitcastvxi1 - use PACKSSWB directly to pack v8i16 to v16i8Simon Pilgrim
2017-09-27[X86][AVX] Improve (i4 bitcast (v4i1 x)) handling for 256-bit vector compare ...Simon Pilgrim
2017-09-18[X86][AVX] Improve (i8 bitcast (v8i1 x)) handling for 256-bit vector compare ...Simon Pilgrim
2017-07-21[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSKSimon Pilgrim
2017-07-06[X86][SSE] Dropped -mcpu from bitcast+setcc testsSimon Pilgrim
2017-06-01[X86] Match bitcast of vxi1 to pmovmskZvi Rackover
2017-05-18[X86] Add explicit triple to test invocationZvi Rackover
2017-05-18[X86] Adding tests for scalar bitcasts from vsetcc. NFC.Zvi Rackover