ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2017-12-31	[X86] Add a DAG combine to fix (v4i1 (bitcast (i4))) before type legalization...	Craig Topper
2017-12-31	[X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don'...	Craig Topper
2017-12-29	[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)	Simon Pilgrim
2017-12-28	[X86] When lowering extending loads from v2i1/v4i1, if we have VLX, use a nar...	Craig Topper
2017-12-07	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	Francis Visoiu Mistrih
2017-12-04	[CodeGen] Unify MBB reference format in both MIR and debug output	Francis Visoiu Mistrih
2017-11-28	[CodeGen] Print register names in lowercase in both MIR and debug output	Francis Visoiu Mistrih
2017-09-24	[X86][SSE] Add support for extending bool vectors bitcasted from scalars	Simon Pilgrim
2017-08-17	Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"	Geoff Berry
2017-08-16	[MachineCopyPropagation] Extend pass to do COPY source forwarding	Geoff Berry
2017-07-06	[X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors	Simon Pilgrim