ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2017-12-07	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	Francis Visoiu Mistrih
2017-12-04	[CodeGen] Unify MBB reference format in both MIR and debug output	Francis Visoiu Mistrih
2017-11-28	[CodeGen] Print register names in lowercase in both MIR and debug output	Francis Visoiu Mistrih
2017-11-08	Revert "Correct dwarf unwind information in function epilogue for X86"	Reid Kleckner
2017-11-07	Reland "Correct dwarf unwind information in function epilogue for X86"	Petar Jovanovic
2017-11-01	Revert "Correct dwarf unwind information in function epilogue for X86"	Petar Jovanovic
2017-11-01	Correct dwarf unwind information in function epilogue for X86	Petar Jovanovic
2017-10-10	[MC] Suppress .Lcfi labels when emitting textual assembly	Reid Kleckner
2017-08-03	[X86] SET0 to use XMM registers where possible PR26018 PR32862	Dinar Temirbulatov
2017-07-31	[X86][AVX512] Add masked MOVS[S\|D] patterns	Guy Blank
2017-07-26	[X86][AVX512] Regenerated and added 32-bit targets to select tests	Simon Pilgrim
2017-05-19	[X86][AVX512] Make i1 illegal in the CodeGen	Guy Blank
2017-03-28	[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers	Craig Topper
2017-03-04	[DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)	Sanjay Patel
2017-01-12	[X86][AVX512] Fix PR31515 - Do not flip vselect condition if it's not a vXi1 ...	Elad Cohen
2016-11-03	[AVX-512] Use 'vnot' instead of 'not' in patterns involving vXi1 vectors.	Craig Topper
2016-10-26	[X86] AVX512 fallback for floating-point scalar selects	Zvi Rackover
2016-10-06	Add test-cases which demontrate pr30561	Zvi Rackover
2016-09-12	add select i1 test, reproduser pr30249.	Igor Breger
2016-09-05	[AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX...	Craig Topper
2016-08-28	[AVX-512] Promote AND/OR/XOR to v2i64/v4i64/v8i64 even when we have AVX512F/A...	Craig Topper
2016-08-07	AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 intege...	Elena Demikhovsky
2016-07-31	[AVX-512] Don't let ExeDependencyFix pass convert VPANDD/Q to VPANDPS/PD unle...	Craig Topper
2016-07-29	[AVX512] Remove the intrinsic forms of VMOVSS/VMOVSD. We don't need two diffe...	Craig Topper
2016-07-22	[AVX512] Add initial support for the Execution Domain fixing pass to change s...	Craig Topper
2016-07-09	VirtRegMap: Replace some identity copies with KILL instructions.	Matthias Braun
2016-06-14	[AVX512] Use MOVZX32 instead of MOVZ16 for loading single v8/v4/v2/v1 masks w...	Craig Topper
2016-05-07	[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.	Ahmed Bougacha
2016-05-06	Revert r268760, it caused PR27670.	Nico Weber
2016-05-06	[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.	Ahmed Bougacha
2016-04-11	[DAGCombiner] Fold xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B)) a...	Simon Pilgrim
2016-01-18	AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instru...	Igor Breger
2015-05-20	AVX-512: fixed algorithm of building vectors of i1 elements	Elena Demikhovsky
2014-11-01	Revert "Temporarily revert r220777 to sort out build bot breakage."	Adrian Prantl
2014-11-01	Temporarily revert r220777 to sort out build bot breakage.	Adrian Prantl
2014-10-28	[x86] Simplify vector selection if condition value type matches vselect value...	Robert Khasanov
2014-08-21	DAGCombiner: Make concat_vector combine safe for EVTs and concat_vectors with...	Benjamin Kramer
2013-12-16	AVX-512: Added legal type MVT::i1 and VK1 register for it.	Elena Demikhovsky
2013-10-31	AVX-512: Implemented CMOV for 512-bit vectors	Elena Demikhovsky